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[MIPS GlobalISel] Legalize constants
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Legalize s1, s8, s16 and s64 G_CONSTANT for MIPS32.

Patch by Petar Avramovic.

Differential Revision: https://reviews.llvm.org/D53077

llvm-svn: 344684
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@petar-jovanovic
petar-jovanovic committed Oct 17, 2018
1 parent 64cfb74 commit 8a08412
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Showing 3 changed files with 296 additions and 1 deletion.
25 changes: 24 additions & 1 deletion llvm/lib/Target/Mips/MipsLegalizerInfo.cpp
View file
Expand Up @@ -40,7 +40,9 @@ MipsLegalizerInfo::MipsLegalizerInfo(const MipsSubtarget &ST) {
.minScalar(0, s32);

getActionDefinitionsBuilder(G_CONSTANT)
.legalFor({s32});
.legalFor({s32})
.minScalar(0, s32)
.customFor({s64});

getActionDefinitionsBuilder(G_GEP)
.legalFor({{p0, s32}});
Expand Down Expand Up @@ -91,6 +93,27 @@ bool MipsLegalizerInfo::legalizeCustom(MachineInstr &MI,
MI.eraseFromParent();
break;
}
case G_CONSTANT: {

unsigned Size = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits();
const LLT sHalf = LLT::scalar(Size / 2);

const APInt &CImmValue = MI.getOperand(1).getCImm()->getValue();

unsigned ResLow = MRI.createGenericVirtualRegister(sHalf);
unsigned ResHigh = MRI.createGenericVirtualRegister(sHalf);
MIRBuilder.buildConstant(
ResLow, *ConstantInt::get(MI.getMF()->getFunction().getContext(),
CImmValue.trunc(Size / 2)));
MIRBuilder.buildConstant(
ResHigh, *ConstantInt::get(MI.getMF()->getFunction().getContext(),
CImmValue.lshr(Size / 2).trunc(Size / 2)));

MIRBuilder.buildMerge(MI.getOperand(0).getReg(), {ResHigh, ResLow});

MI.eraseFromParent();
break;
}
default:
return false;
}
Expand Down
164 changes: 164 additions & 0 deletions llvm/test/CodeGen/Mips/GlobalISel/legalizer/constants.mir
View file
@@ -0,0 +1,164 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
--- |

define void @any_i64() {entry: ret void}
define void @any_i32() {entry: ret void}
define void @signed_i16() {entry: ret void}
define void @signed_i8() {entry: ret void}
define void @unsigned_i16() {entry: ret void}
define void @unsigned_i8() {entry: ret void}
define void @i1_true() {entry: ret void}
define void @i1_false() {entry: ret void}

...
---
name: any_i64
alignment: 2
tracksRegLiveness: true
body: |
bb.1.entry:
; MIPS32-LABEL: name: any_i64
; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; MIPS32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; MIPS32: $v0 = COPY [[C]](s32)
; MIPS32: $v1 = COPY [[C1]](s32)
; MIPS32: RetRA implicit $v0, implicit $v1
%0:_(s64) = G_CONSTANT i64 -9223372036854775808
%1:_(s32), %2:_(s32) = G_UNMERGE_VALUES %0(s64)
$v0 = COPY %2(s32)
$v1 = COPY %1(s32)
RetRA implicit $v0, implicit $v1
...
---
name: any_i32
alignment: 2
tracksRegLiveness: true
body: |
bb.1.entry:
; MIPS32-LABEL: name: any_i32
; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; MIPS32: $v0 = COPY [[C]](s32)
; MIPS32: RetRA implicit $v0
%0:_(s32) = G_CONSTANT i32 -2147483648
$v0 = COPY %0(s32)
RetRA implicit $v0
...
---
name: signed_i16
alignment: 2
tracksRegLiveness: true
body: |
bb.1.entry:
; MIPS32-LABEL: name: signed_i16
; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -32768
; MIPS32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY [[C]](s32)
; MIPS32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C1]]
; MIPS32: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C1]]
; MIPS32: $v0 = COPY [[ASHR]](s32)
; MIPS32: RetRA implicit $v0
%0:_(s16) = G_CONSTANT i16 -32768
%1:_(s32) = G_SEXT %0(s16)
$v0 = COPY %1(s32)
RetRA implicit $v0
...
---
name: signed_i8
alignment: 2
tracksRegLiveness: true
body: |
bb.1.entry:
; MIPS32-LABEL: name: signed_i8
; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -128
; MIPS32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY [[C]](s32)
; MIPS32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C1]]
; MIPS32: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C1]]
; MIPS32: $v0 = COPY [[ASHR]](s32)
; MIPS32: RetRA implicit $v0
%0:_(s8) = G_CONSTANT i8 -128
%1:_(s32) = G_SEXT %0(s8)
$v0 = COPY %1(s32)
RetRA implicit $v0
...
---
name: unsigned_i16
alignment: 2
tracksRegLiveness: true
body: |
bb.1.entry:
; MIPS32-LABEL: name: unsigned_i16
; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -32768
; MIPS32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY [[C]](s32)
; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C1]]
; MIPS32: $v0 = COPY [[AND]](s32)
; MIPS32: RetRA implicit $v0
%0:_(s16) = G_CONSTANT i16 -32768
%1:_(s32) = G_ZEXT %0(s16)
$v0 = COPY %1(s32)
RetRA implicit $v0
...
---
name: unsigned_i8
alignment: 2
tracksRegLiveness: true
body: |
bb.1.entry:
; MIPS32-LABEL: name: unsigned_i8
; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -128
; MIPS32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY [[C]](s32)
; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C1]]
; MIPS32: $v0 = COPY [[AND]](s32)
; MIPS32: RetRA implicit $v0
%0:_(s8) = G_CONSTANT i8 -128
%1:_(s32) = G_ZEXT %0(s8)
$v0 = COPY %1(s32)
RetRA implicit $v0
...
---
name: i1_true
alignment: 2
tracksRegLiveness: true
body: |
bb.1.entry:
; MIPS32-LABEL: name: i1_true
; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1
; MIPS32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY [[C]](s32)
; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C1]]
; MIPS32: $v0 = COPY [[AND]](s32)
; MIPS32: RetRA implicit $v0
%0:_(s1) = G_CONSTANT i1 true
%1:_(s32) = G_ZEXT %0(s1)
$v0 = COPY %1(s32)
RetRA implicit $v0
...
---
name: i1_false
alignment: 2
tracksRegLiveness: true
body: |
bb.1.entry:
; MIPS32-LABEL: name: i1_false
; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; MIPS32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY [[C]](s32)
; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C1]]
; MIPS32: $v0 = COPY [[AND]](s32)
; MIPS32: RetRA implicit $v0
%0:_(s1) = G_CONSTANT i1 false
%1:_(s32) = G_ZEXT %0(s1)
$v0 = COPY %1(s32)
RetRA implicit $v0
...
108 changes: 108 additions & 0 deletions llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/constants.ll
View file
@@ -0,0 +1,108 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -O0 -mtriple=mipsel-linux-gnu -global-isel -verify-machineinstrs %s -o -| FileCheck %s -check-prefixes=MIPS32

define i64 @any_i64() {
; MIPS32-LABEL: any_i64:
; MIPS32: # %bb.0: # %entry
; MIPS32-NEXT: lui $1, 0
; MIPS32-NEXT: ori $2, $1, 0
; MIPS32-NEXT: lui $1, 32768
; MIPS32-NEXT: ori $3, $1, 0
; MIPS32-NEXT: jr $ra
; MIPS32-NEXT: nop
entry:
ret i64 -9223372036854775808
}

define i32 @any_i32() {
; MIPS32-LABEL: any_i32:
; MIPS32: # %bb.0: # %entry
; MIPS32-NEXT: lui $1, 32768
; MIPS32-NEXT: ori $2, $1, 0
; MIPS32-NEXT: jr $ra
; MIPS32-NEXT: nop
entry:
ret i32 -2147483648
}

define signext i16 @signed_i16() {
; MIPS32-LABEL: signed_i16:
; MIPS32: # %bb.0: # %entry
; MIPS32-NEXT: lui $1, 65535
; MIPS32-NEXT: ori $1, $1, 32768
; MIPS32-NEXT: sll $1, $1, 16
; MIPS32-NEXT: sra $2, $1, 16
; MIPS32-NEXT: jr $ra
; MIPS32-NEXT: nop
entry:
ret i16 -32768
}

define signext i8 @signed_i8() {
; MIPS32-LABEL: signed_i8:
; MIPS32: # %bb.0: # %entry
; MIPS32-NEXT: lui $1, 65535
; MIPS32-NEXT: ori $1, $1, 65408
; MIPS32-NEXT: sll $1, $1, 24
; MIPS32-NEXT: sra $2, $1, 24
; MIPS32-NEXT: jr $ra
; MIPS32-NEXT: nop
entry:
ret i8 -128
}

define zeroext i16 @unsigned_i16() {
; MIPS32-LABEL: unsigned_i16:
; MIPS32: # %bb.0: # %entry
; MIPS32-NEXT: lui $1, 65535
; MIPS32-NEXT: ori $1, $1, 32768
; MIPS32-NEXT: lui $2, 0
; MIPS32-NEXT: ori $2, $2, 65535
; MIPS32-NEXT: and $2, $1, $2
; MIPS32-NEXT: jr $ra
; MIPS32-NEXT: nop
entry:
ret i16 -32768
}

define zeroext i8 @unsigned_i8() {
; MIPS32-LABEL: unsigned_i8:
; MIPS32: # %bb.0: # %entry
; MIPS32-NEXT: lui $1, 65535
; MIPS32-NEXT: ori $1, $1, 65408
; MIPS32-NEXT: lui $2, 0
; MIPS32-NEXT: ori $2, $2, 255
; MIPS32-NEXT: and $2, $1, $2
; MIPS32-NEXT: jr $ra
; MIPS32-NEXT: nop
entry:
ret i8 -128
}

define zeroext i1 @i1_true() {
; MIPS32-LABEL: i1_true:
; MIPS32: # %bb.0: # %entry
; MIPS32-NEXT: lui $1, 65535
; MIPS32-NEXT: ori $1, $1, 65535
; MIPS32-NEXT: lui $2, 0
; MIPS32-NEXT: ori $2, $2, 1
; MIPS32-NEXT: and $2, $1, $2
; MIPS32-NEXT: jr $ra
; MIPS32-NEXT: nop
entry:
ret i1 true
}

define zeroext i1 @i1_false() {
; MIPS32-LABEL: i1_false:
; MIPS32: # %bb.0: # %entry
; MIPS32-NEXT: lui $1, 0
; MIPS32-NEXT: ori $1, $1, 0
; MIPS32-NEXT: lui $2, 0
; MIPS32-NEXT: ori $2, $2, 1
; MIPS32-NEXT: and $2, $1, $2
; MIPS32-NEXT: jr $ra
; MIPS32-NEXT: nop
entry:
ret i1 false
}

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