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Revert "[AAPointerInfo] handle multiple offsets in PHI"
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This reverts commit 179ed88.

Reason: This change is dependent on a commit that needs to be rolled
back because it broke the ASan buildbot. See
https://reviews.llvm.org/rGfc21f2d7bae2e0be630470cc7ca9323ed5859892 for
more information.
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@hctim
hctim committed Dec 17, 2022
1 parent 67ba5c5 commit 8b446ea
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Showing 7 changed files with 37 additions and 315 deletions.
44 changes: 21 additions & 23 deletions llvm/include/llvm/Analysis/CycleAnalysis.h
View file
Expand Up @@ -27,27 +27,6 @@ extern template class GenericCycle<SSAContext>;
using CycleInfo = GenericCycleInfo<SSAContext>;
using Cycle = CycleInfo::CycleT;

/// Legacy analysis pass which computes a \ref CycleInfo.
class CycleInfoWrapperPass : public FunctionPass {
Function *F = nullptr;
CycleInfo CI;

public:
static char ID;

CycleInfoWrapperPass();

CycleInfo &getResult() { return CI; }
const CycleInfo &getResult() const { return CI; }

bool runOnFunction(Function &F) override;
void getAnalysisUsage(AnalysisUsage &AU) const override;
void releaseMemory() override;
void print(raw_ostream &OS, const Module *M = nullptr) const override;

// TODO: verify analysis?
};

/// Analysis pass which computes a \ref CycleInfo.
class CycleAnalysis : public AnalysisInfoMixin<CycleAnalysis> {
friend AnalysisInfoMixin<CycleAnalysis>;
Expand All @@ -57,8 +36,6 @@ class CycleAnalysis : public AnalysisInfoMixin<CycleAnalysis> {
/// Provide the result typedef for this analysis pass.
using Result = CycleInfo;

using LegacyWrapper = CycleInfoWrapperPass;

/// Run the analysis pass over a function and produce a dominator tree.
CycleInfo run(Function &F, FunctionAnalysisManager &);

Expand All @@ -75,6 +52,27 @@ class CycleInfoPrinterPass : public PassInfoMixin<CycleInfoPrinterPass> {
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};

/// Legacy analysis pass which computes a \ref CycleInfo.
class CycleInfoWrapperPass : public FunctionPass {
Function *F = nullptr;
CycleInfo CI;

public:
static char ID;

CycleInfoWrapperPass();

CycleInfo &getCycleInfo() { return CI; }
const CycleInfo &getCycleInfo() const { return CI; }

bool runOnFunction(Function &F) override;
void getAnalysisUsage(AnalysisUsage &AU) const override;
void releaseMemory() override;
void print(raw_ostream &OS, const Module *M = nullptr) const override;

// TODO: verify analysis?
};

} // end namespace llvm

#endif // LLVM_ANALYSIS_CYCLEANALYSIS_H
33 changes: 4 additions & 29 deletions llvm/include/llvm/Transforms/IPO/Attributor.h
View file
Expand Up @@ -1090,47 +1090,22 @@ class SubsumingPositionIterator {
iterator end() { return IRPositions.end(); }
};

/// Wrapper for FunctionAnalysisManager.
/// Wrapper for FunctoinAnalysisManager.
struct AnalysisGetter {
// The client may be running the old pass manager, in which case, we need to
// map the requested Analysis to its equivalent wrapper in the old pass
// manager. The scheme implemented here does not require every Analysis to be
// updated. Only those new analyses that the client cares about in the old
// pass manager need to expose a LegacyWrapper type, and that wrapper should
// support a getResult() method that matches the new Analysis.
//
// We need SFINAE to check for the LegacyWrapper, but function templates don't
// allow partial specialization, which is needed in this case. So instead, we
// use a constexpr bool to perform the SFINAE, and then use this information
// inside the function template.
template <typename, typename = void> static constexpr bool HasLegacyWrapper = false;

template <typename Analysis>
typename Analysis::Result *getAnalysis(const Function &F) {
if (FAM)
return &FAM->getResult<Analysis>(const_cast<Function &>(F));
if constexpr (HasLegacyWrapper<Analysis>)
if (LegacyPass)
return &LegacyPass
->getAnalysis<typename Analysis::LegacyWrapper>(
const_cast<Function &>(F))
.getResult();
return nullptr;
if (!FAM || !F.getParent())
return nullptr;
return &FAM->getResult<Analysis>(const_cast<Function &>(F));
}

AnalysisGetter(FunctionAnalysisManager &FAM) : FAM(&FAM) {}
AnalysisGetter(Pass *P) : LegacyPass(P) {}
AnalysisGetter() = default;

private:
FunctionAnalysisManager *FAM = nullptr;
Pass *LegacyPass = nullptr;
};

template <typename Analysis>
constexpr bool AnalysisGetter::HasLegacyWrapper<
Analysis, std::void_t<typename Analysis::LegacyWrapper>> = true;

/// Data structure to hold cached (LLVM-IR) information.
///
/// All attributes are given an InformationCache object at creation time to
Expand Down
17 changes: 2 additions & 15 deletions llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
View file
Expand Up @@ -13,7 +13,6 @@
#include "AMDGPU.h"
#include "GCNSubtarget.h"
#include "Utils/AMDGPUBaseInfo.h"
#include "llvm/Analysis/CycleAnalysis.h"
#include "llvm/CodeGen/TargetPassConfig.h"
#include "llvm/IR/IntrinsicsAMDGPU.h"
#include "llvm/IR/IntrinsicsR600.h"
Expand All @@ -22,10 +21,6 @@

#define DEBUG_TYPE "amdgpu-attributor"

namespace llvm {
void initializeCycleInfoWrapperPassPass(PassRegistry &);
}

using namespace llvm;

#define AMDGPU_ATTRIBUTE(Name, Str) Name##_POS,
Expand Down Expand Up @@ -752,7 +747,7 @@ class AMDGPUAttributor : public ModulePass {

bool runOnModule(Module &M) override {
SetVector<Function *> Functions;
AnalysisGetter AG(this);
AnalysisGetter AG;
for (Function &F : M) {
if (!F.isIntrinsic())
Functions.insert(&F);
Expand Down Expand Up @@ -787,10 +782,6 @@ class AMDGPUAttributor : public ModulePass {
return Change == ChangeStatus::CHANGED;
}

void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequired<CycleInfoWrapperPass>();
}

StringRef getPassName() const override { return "AMDGPU Attributor"; }
TargetMachine *TM;
static char ID;
Expand All @@ -800,8 +791,4 @@ class AMDGPUAttributor : public ModulePass {
char AMDGPUAttributor::ID = 0;

Pass *llvm::createAMDGPUAttributorPass() { return new AMDGPUAttributor(); }
INITIALIZE_PASS_BEGIN(AMDGPUAttributor, DEBUG_TYPE, "AMDGPU Attributor", false,
false)
INITIALIZE_PASS_DEPENDENCY(CycleInfoWrapperPass);
INITIALIZE_PASS_END(AMDGPUAttributor, DEBUG_TYPE, "AMDGPU Attributor", false,
false)
INITIALIZE_PASS(AMDGPUAttributor, DEBUG_TYPE, "AMDGPU Attributor", false, false)
49 changes: 10 additions & 39 deletions llvm/lib/Transforms/IPO/AttributorAttributes.cpp
View file
Expand Up @@ -28,7 +28,6 @@
#include "llvm/Analysis/AssumeBundleQueries.h"
#include "llvm/Analysis/AssumptionCache.h"
#include "llvm/Analysis/CaptureTracking.h"
#include "llvm/Analysis/CycleAnalysis.h"
#include "llvm/Analysis/InstructionSimplify.h"
#include "llvm/Analysis/LazyValueInfo.h"
#include "llvm/Analysis/MemoryBuiltins.h"
Expand Down Expand Up @@ -1443,13 +1442,10 @@ ChangeStatus AAPointerInfoFloating::updateImpl(Attributor &A) {
return true;
};

const auto *F = getAnchorScope();
const auto *CI =
F ? A.getInfoCache().getAnalysisResultForFunction<CycleAnalysis>(*F)
: nullptr;
const auto *TLI =
F ? A.getInfoCache().getTargetLibraryInfoForFunction(*F) : nullptr;

getAnchorScope()
? A.getInfoCache().getTargetLibraryInfoForFunction(*getAnchorScope())
: nullptr;
auto UsePred = [&](const Use &U, bool &Follow) -> bool {
Value *CurPtr = U.get();
User *Usr = U.getUser();
Expand Down Expand Up @@ -1521,56 +1517,31 @@ ChangeStatus AAPointerInfoFloating::updateImpl(Attributor &A) {
return true;
}

// Check if the PHI operand can be traced back to AssociatedValue.
// Check if the PHI operand is not dependent on the PHI itself.
APInt Offset(
DL.getIndexSizeInBits(CurPtr->getType()->getPointerAddressSpace()),
0);
Value *CurPtrBase = CurPtr->stripAndAccumulateConstantOffsets(
DL, Offset, /* AllowNonInbounds */ true);
auto It = OffsetInfoMap.find(CurPtrBase);
if (It == OffsetInfoMap.end()) {
LLVM_DEBUG(dbgs() << "[AAPointerInfo] PHI operand is too complex "
<< *CurPtr << " in " << *Usr << "\n");
UsrOI.setUnknown();
Follow = true;
return true;
}

auto mayBeInCycleHeader = [](const CycleInfo *CI, const Instruction *I) {
if (!CI)
return true;
auto *BB = I->getParent();
auto *C = CI->getCycle(BB);
if (!C)
return false;
return BB == C->getHeader();
};

// Check if the PHI operand is not dependent on the PHI itself. Every
// recurrence is a cyclic net of PHIs in the data flow, and has an
// equivalent Cycle in the control flow. One of those PHIs must be in the
// header of that control flow Cycle. This is independent of the choice of
// Cycles reported by CycleInfo. It is sufficient to check the PHIs in
// every Cycle header; if such a node is marked unknown, this will
// eventually propagate through the whole net of PHIs in the recurrence.
if (mayBeInCycleHeader(CI, cast<Instruction>(Usr))) {
if (It != OffsetInfoMap.end()) {
auto BaseOI = It->getSecond();
BaseOI.addToAll(Offset.getZExtValue());
if (IsFirstPHIUser || BaseOI == UsrOI) {
LLVM_DEBUG(dbgs() << "[AAPointerInfo] PHI is invariant " << *CurPtr
<< " in " << *Usr << "\n");
return HandlePassthroughUser(Usr, PtrOI, Follow);
}

LLVM_DEBUG(
dbgs() << "[AAPointerInfo] PHI operand pointer offset mismatch "
<< *CurPtr << " in " << *Usr << "\n");
UsrOI.setUnknown();
Follow = true;
return true;
} else {
LLVM_DEBUG(dbgs() << "[AAPointerInfo] PHI operand is too complex "
<< *CurPtr << " in " << *Usr << "\n");
}

UsrOI.merge(PtrOI);
// TODO: Approximate in case we know the direction of the recurrence.
UsrOI.setUnknown();
Follow = true;
return true;
}
Expand Down
30 changes: 0 additions & 30 deletions llvm/test/CodeGen/AMDGPU/implicitarg-attributes.ll
View file
Expand Up @@ -63,36 +63,6 @@ entry:
ret void
}

; CHECK-NOT: hidden_hostcall_buffer
; CHECK-NOT: hidden_multigrid_sync_arg
; CHECK-LABEL: .name: kernel_3

define amdgpu_kernel void @kernel_3(i32 addrspace(1)* %a, i1 %cond) {
entry:
%tmp7 = tail call i8 addrspace(4)* @llvm.amdgcn.implicitarg.ptr()
br i1 %cond, label %old, label %new

old: ; preds = %entry
%tmp4 = getelementptr i8, i8 addrspace(4)* %tmp7, i64 12
br label %join

new: ; preds = %entry
%tmp12 = getelementptr inbounds i8, i8 addrspace(4)* %tmp7, i64 18
br label %join

join: ; preds = %new, %old
%.in.in.in = phi i8 addrspace(4)* [ %tmp12, %new ], [ %tmp4, %old ]
%.in.in = bitcast i8 addrspace(4)* %.in.in.in to i16 addrspace(4)*

;;; THIS USE of implicitarg_ptr should not produce hostcall metadata
%.in = load i16, i16 addrspace(4)* %.in.in, align 2

%idx.ext = sext i16 %.in to i64
%add.ptr3 = getelementptr inbounds i32, i32 addrspace(1)* %a, i64 %idx.ext
%tmp16 = atomicrmw add i32 addrspace(1)* %add.ptr3, i32 15 syncscope("agent-one-as") monotonic, align 4
ret void
}

declare i32 @llvm.amdgcn.workitem.id.x()

declare align 4 i8 addrspace(4)* @llvm.amdgcn.implicitarg.ptr()
Expand Down
10 changes: 0 additions & 10 deletions llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
View file
Expand Up @@ -51,8 +51,6 @@
; GCN-O0-NEXT: Scalarize Masked Memory Intrinsics
; GCN-O0-NEXT: Expand reduction intrinsics
; GCN-O0-NEXT: AMDGPU Attributor
; GCN-O0-NEXT: FunctionPass Manager
; GCN-O0-NEXT: Cycle Info Analysis
; GCN-O0-NEXT: CallGraph Construction
; GCN-O0-NEXT: Call Graph SCC Pass Manager
; GCN-O0-NEXT: AMDGPU Annotate Kernel Features
Expand Down Expand Up @@ -227,8 +225,6 @@
; GCN-O1-NEXT: Natural Loop Information
; GCN-O1-NEXT: TLS Variable Hoist
; GCN-O1-NEXT: AMDGPU Attributor
; GCN-O1-NEXT: FunctionPass Manager
; GCN-O1-NEXT: Cycle Info Analysis
; GCN-O1-NEXT: CallGraph Construction
; GCN-O1-NEXT: Call Graph SCC Pass Manager
; GCN-O1-NEXT: AMDGPU Annotate Kernel Features
Expand Down Expand Up @@ -513,8 +509,6 @@
; GCN-O1-OPTS-NEXT: TLS Variable Hoist
; GCN-O1-OPTS-NEXT: Early CSE
; GCN-O1-OPTS-NEXT: AMDGPU Attributor
; GCN-O1-OPTS-NEXT: FunctionPass Manager
; GCN-O1-OPTS-NEXT: Cycle Info Analysis
; GCN-O1-OPTS-NEXT: CallGraph Construction
; GCN-O1-OPTS-NEXT: Call Graph SCC Pass Manager
; GCN-O1-OPTS-NEXT: AMDGPU Annotate Kernel Features
Expand Down Expand Up @@ -813,8 +807,6 @@
; GCN-O2-NEXT: TLS Variable Hoist
; GCN-O2-NEXT: Early CSE
; GCN-O2-NEXT: AMDGPU Attributor
; GCN-O2-NEXT: FunctionPass Manager
; GCN-O2-NEXT: Cycle Info Analysis
; GCN-O2-NEXT: CallGraph Construction
; GCN-O2-NEXT: Call Graph SCC Pass Manager
; GCN-O2-NEXT: AMDGPU Annotate Kernel Features
Expand Down Expand Up @@ -1126,8 +1118,6 @@
; GCN-O3-NEXT: Optimization Remark Emitter
; GCN-O3-NEXT: Global Value Numbering
; GCN-O3-NEXT: AMDGPU Attributor
; GCN-O3-NEXT: FunctionPass Manager
; GCN-O3-NEXT: Cycle Info Analysis
; GCN-O3-NEXT: CallGraph Construction
; GCN-O3-NEXT: Call Graph SCC Pass Manager
; GCN-O3-NEXT: AMDGPU Annotate Kernel Features
Expand Down

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