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[RISCV] Avoid RegScavenger::forward in RISCVMakeCompressibleOpt
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RegScavenger::backward is preferred because it does not rely on accurate
kill flags.

Differential Revision: https://reviews.llvm.org/D150562
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jayfoad committed May 16, 2023
1 parent 64599ac commit 8cf5f73
Showing 1 changed file with 4 additions and 10 deletions.
14 changes: 4 additions & 10 deletions llvm/lib/Target/RISCV/RISCVMakeCompressible.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -227,9 +227,6 @@ static Register analyzeCompressibleUses(MachineInstr &FirstMI,
const TargetRegisterInfo *TRI =
MBB.getParent()->getSubtarget().getRegisterInfo();

RegScavenger RS;
RS.enterBasicBlock(MBB);

for (MachineBasicBlock::instr_iterator I = FirstMI.getIterator(),
E = MBB.instr_end();
I != E; ++I) {
Expand All @@ -238,14 +235,8 @@ static Register analyzeCompressibleUses(MachineInstr &FirstMI,
// Determine if this is an instruction which would benefit from using the
// new register.
RegImmPair CandidateRegImm = getRegImmPairPreventingCompression(MI);
if (CandidateRegImm.Reg == RegImm.Reg &&
CandidateRegImm.Imm == RegImm.Imm) {
// Advance tracking since the value in the new register must be live for
// this instruction too.
RS.forward(I);

if (CandidateRegImm.Reg == RegImm.Reg && CandidateRegImm.Imm == RegImm.Imm)
MIs.push_back(&MI);
}

// If RegImm.Reg is modified by this instruction, then we cannot optimize
// past this instruction. If the register is already compressed, then it may
Expand Down Expand Up @@ -278,6 +269,9 @@ static Register analyzeCompressibleUses(MachineInstr &FirstMI,
else
return RISCV::NoRegister;

RegScavenger RS;
RS.enterBasicBlockEnd(MBB);
RS.backward(MIs.back()->getIterator());
return RS.scavengeRegisterBackwards(*RCToScavenge, FirstMI.getIterator(),
/*RestoreAfter=*/false, /*SPAdj=*/0,
/*AllowSpill=*/false);
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