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[x86] add test to show potential miscompile with undef value; NFC
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c2a5a87
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rotateright committed May 13, 2022
1 parent 7e3ea55 commit 905eff4
Showing 1 changed file with 17 additions and 0 deletions.
17 changes: 17 additions & 0 deletions llvm/test/CodeGen/X86/combine-urem.ll
Expand Up @@ -58,6 +58,23 @@ define <4 x i32> @combine_vec_urem_by_negone(<4 x i32> %x) {
ret <4 x i32> %1
}

; Use PSLLI intrinsic to postpone the undef creation until after urem-by-constant expansion

define <4 x i32> @combine_vec_urem_undef_by_negone(<4 x i32> %in) {
; SSE-LABEL: combine_vec_urem_undef_by_negone:
; SSE: # %bb.0:
; SSE-NEXT: xorps %xmm0, %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: combine_vec_urem_undef_by_negone:
; AVX: # %bb.0:
; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0
; AVX-NEXT: retq
%x = call <4 x i32> @llvm.x86.sse2.pslli.d(<4 x i32> undef, i32 0)
%y = urem <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
ret <4 x i32> %y
}

; fold (urem x, INT_MIN) -> (and x, ~INT_MIN)
define i32 @combine_urem_by_minsigned(i32 %x) {
; CHECK-LABEL: combine_urem_by_minsigned:
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