[InstCombine] Fold (mul(abs(x),abs(x))) -> (mul(x,x)) (PR39476)

This patch adds support for discarding integer absolutes (abs + nabs variants) from self-multiplications.

ABS Alive2: http://volta.cs.utah.edu:8080/z/rwcc8W
NABS Alive2: http://volta.cs.utah.edu:8080/z/jZXUwQ

This is an InstCombine version of D79304 - I'm not sure yet if we'll need that after this.

Reviewed By: @lebedev.ri and @xbolva00

Differential Revision: https://reviews.llvm.org/D79319

llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp

@@ -275,6 +275,15 @@ Instruction *InstCombiner::visitMul(BinaryOperator &I) {
     }
   }
 
+  // abs(X) * abs(X) -> X * X
+  // nabs(X) * nabs(X) -> X * X
+  if (Op0 == Op1) {
+    Value *X, *Y;
+    SelectPatternFlavor SPF = matchSelectPattern(Op0, X, Y).Flavor;
+    if (SPF == SPF_ABS || SPF == SPF_NABS)
+      return BinaryOperator::CreateMul(X, X);
+  }
+
   // -X * C --> X * -C
   Value *X, *Y;
   Constant *Op1C;

llvm/test/Transforms/InstCombine/mul.ll

@@ -610,10 +610,7 @@ define i32 @mul_div_select(i32 %x, i32 %y, i1 %c) {
 ; fold mul(abs(x),abs(x)) -> mul(x,x)
 define i31 @combine_mul_abs_i31(i31 %0) {
 ; CHECK-LABEL: @combine_mul_abs_i31(
-; CHECK-NEXT:    [[C:%.*]] = icmp slt i31 [[TMP0:%.*]], 0
-; CHECK-NEXT:    [[S:%.*]] = sub nsw i31 0, [[TMP0]]
-; CHECK-NEXT:    [[R:%.*]] = select i1 [[C]], i31 [[S]], i31 [[TMP0]]
-; CHECK-NEXT:    [[M:%.*]] = mul i31 [[R]], [[R]]
+; CHECK-NEXT:    [[M:%.*]] = mul i31 [[TMP0:%.*]], [[TMP0]]
 ; CHECK-NEXT:    ret i31 [[M]]
 ;
   %c = icmp slt i31 %0, 0
@@ -625,10 +622,7 @@ define i31 @combine_mul_abs_i31(i31 %0) {
 
 define i32 @combine_mul_abs_i32(i32 %0) {
 ; CHECK-LABEL: @combine_mul_abs_i32(
-; CHECK-NEXT:    [[C:%.*]] = icmp slt i32 [[TMP0:%.*]], 0
-; CHECK-NEXT:    [[S:%.*]] = sub nsw i32 0, [[TMP0]]
-; CHECK-NEXT:    [[R:%.*]] = select i1 [[C]], i32 [[S]], i32 [[TMP0]]
-; CHECK-NEXT:    [[M:%.*]] = mul i32 [[R]], [[R]]
+; CHECK-NEXT:    [[M:%.*]] = mul i32 [[TMP0:%.*]], [[TMP0]]
 ; CHECK-NEXT:    ret i32 [[M]]
 ;
   %c = icmp slt i32 %0, 0
@@ -640,10 +634,7 @@ define i32 @combine_mul_abs_i32(i32 %0) {
 
 define <4 x i32> @combine_mul_abs_v4i32(<4 x i32> %0) {
 ; CHECK-LABEL: @combine_mul_abs_v4i32(
-; CHECK-NEXT:    [[C:%.*]] = icmp slt <4 x i32> [[TMP0:%.*]], zeroinitializer
-; CHECK-NEXT:    [[S:%.*]] = sub nsw <4 x i32> zeroinitializer, [[TMP0]]
-; CHECK-NEXT:    [[R:%.*]] = select <4 x i1> [[C]], <4 x i32> [[S]], <4 x i32> [[TMP0]]
-; CHECK-NEXT:    [[M:%.*]] = mul <4 x i32> [[R]], [[R]]
+; CHECK-NEXT:    [[M:%.*]] = mul <4 x i32> [[TMP0:%.*]], [[TMP0]]
 ; CHECK-NEXT:    ret <4 x i32> [[M]]
 ;
   %c = icmp slt <4 x i32> %0, zeroinitializer
@@ -656,10 +647,7 @@ define <4 x i32> @combine_mul_abs_v4i32(<4 x i32> %0) {
 ; fold mul(nabs(x),nabs(x)) -> mul(x,x)
 define i31 @combine_mul_nabs_i31(i31 %0) {
 ; CHECK-LABEL: @combine_mul_nabs_i31(
-; CHECK-NEXT:    [[C:%.*]] = icmp slt i31 [[TMP0:%.*]], 0
-; CHECK-NEXT:    [[S:%.*]] = sub nsw i31 0, [[TMP0]]
-; CHECK-NEXT:    [[R:%.*]] = select i1 [[C]], i31 [[TMP0]], i31 [[S]]
-; CHECK-NEXT:    [[M:%.*]] = mul i31 [[R]], [[R]]
+; CHECK-NEXT:    [[M:%.*]] = mul i31 [[TMP0:%.*]], [[TMP0]]
 ; CHECK-NEXT:    ret i31 [[M]]
 ;
   %c = icmp slt i31 %0, 0
@@ -671,10 +659,7 @@ define i31 @combine_mul_nabs_i31(i31 %0) {
 
 define i32 @combine_mul_nabs_i32(i32 %0) {
 ; CHECK-LABEL: @combine_mul_nabs_i32(
-; CHECK-NEXT:    [[C:%.*]] = icmp slt i32 [[TMP0:%.*]], 0
-; CHECK-NEXT:    [[S:%.*]] = sub nsw i32 0, [[TMP0]]
-; CHECK-NEXT:    [[R:%.*]] = select i1 [[C]], i32 [[TMP0]], i32 [[S]]
-; CHECK-NEXT:    [[M:%.*]] = mul i32 [[R]], [[R]]
+; CHECK-NEXT:    [[M:%.*]] = mul i32 [[TMP0:%.*]], [[TMP0]]
 ; CHECK-NEXT:    ret i32 [[M]]
 ;
   %c = icmp slt i32 %0, 0
@@ -686,10 +671,7 @@ define i32 @combine_mul_nabs_i32(i32 %0) {
 
 define <4 x i32> @combine_mul_nabs_v4i32(<4 x i32> %0) {
 ; CHECK-LABEL: @combine_mul_nabs_v4i32(
-; CHECK-NEXT:    [[C:%.*]] = icmp slt <4 x i32> [[TMP0:%.*]], zeroinitializer
-; CHECK-NEXT:    [[S:%.*]] = sub nsw <4 x i32> zeroinitializer, [[TMP0]]
-; CHECK-NEXT:    [[R:%.*]] = select <4 x i1> [[C]], <4 x i32> [[TMP0]], <4 x i32> [[S]]
-; CHECK-NEXT:    [[M:%.*]] = mul <4 x i32> [[R]], [[R]]
+; CHECK-NEXT:    [[M:%.*]] = mul <4 x i32> [[TMP0:%.*]], [[TMP0]]
 ; CHECK-NEXT:    ret <4 x i32> [[M]]
 ;
   %c = icmp slt <4 x i32> %0, zeroinitializer