[X86] Introduce Lakemont CPU.

Add a new Intel MCU CPU Lakemont, which doesn't support X87. Differential Revision: http://reviews.llvm.org/D18650 llvm-svn: 265128
llvm · Apr 1, 2016 · 958eb46 · 958eb46
1 parent d51775b
commit 958eb46
Show file tree

Hide file tree

Showing 2 changed files with 12 additions and 0 deletions.
diff --git a/llvm/lib/Target/X86/X86.td b/llvm/lib/Target/X86/X86.td
@@ -283,6 +283,9 @@ def : Proc<"pentium4",        [FeatureX87, FeatureSlowUAMem16, FeatureMMX,
 def : Proc<"pentium4m",       [FeatureX87, FeatureSlowUAMem16, FeatureMMX,
                                FeatureSSE2, FeatureFXSR, FeatureSlowBTMem]>;
 
+// Intel Quark.
+def : Proc<"lakemont",        []>;
+
 // Intel Core Duo.
 def : ProcessorModel<"yonah", SandyBridgeModel,
                      [FeatureX87, FeatureSlowUAMem16, FeatureMMX, FeatureSSE3,

diff --git a/llvm/test/CodeGen/X86/lakemont.ll b/llvm/test/CodeGen/X86/lakemont.ll
@@ -0,0 +1,9 @@
+; RUN: llc < %s -march=x86 -mcpu=lakemont | FileCheck %s
+
+; Make sure -mcpu=lakemont implies soft floats.
+define float @test(float %a, float %b) nounwind readnone {
+; CHECK-LABEL: test:
+; CHECK: __addsf3
+  %add = fadd float %a, %b
+  ret float %add
+}