[Hexagon] Return an i64 for result 0 from LowerREADCYCLECOUNTER inste…

…ad of an i32.

As far as I can tell, the node coming in has an i64 result so the
return should have the same type. The HexagonISD node used for
this has a type profile that says the result is i64.

Found while trying to add assserts to LegalizeDAG to catch
result type mismatches.

Reviewed By: kparzysz

Differential Revision: https://reviews.llvm.org/D98962

llvm/lib/Target/Hexagon/HexagonISelLowering.cpp

@@ -703,7 +703,7 @@ SDValue HexagonTargetLowering::LowerREADCYCLECOUNTER(SDValue Op,
                                                      SelectionDAG &DAG) const {
   SDValue Chain = Op.getOperand(0);
   SDLoc dl(Op);
-  SDVTList VTs = DAG.getVTList(MVT::i32, MVT::Other);
+  SDVTList VTs = DAG.getVTList(MVT::i64, MVT::Other);
   return DAG.getNode(HexagonISD::READCYCLE, dl, VTs, Chain);
 }