[FastISel][NFC] Refactor if/else chain into early returns

This will make it easier to add more cases in a subsequent commit and also
better conforms to the coding guidelines.

Depends on D151330

Differential Revision: https://reviews.llvm.org/D151331

llvm/lib/CodeGen/SelectionDAG/FastISel.cpp

@@ -1279,7 +1279,9 @@ bool FastISel::selectIntrinsicCall(const IntrinsicInst *II) {
       // undef DBG_VALUE to terminate any prior location.
       BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD.getDL(), II, false, 0U,
               DI->getVariable(), DI->getExpression());
-    } else if (const auto *CI = dyn_cast<ConstantInt>(V)) {
+      return true;
+    }
+    if (const auto *CI = dyn_cast<ConstantInt>(V)) {
       // See if there's an expression to constant-fold.
       DIExpression *Expr = DI->getExpression();
       if (Expr)
@@ -1296,36 +1298,40 @@ bool FastISel::selectIntrinsicCall(const IntrinsicInst *II) {
             .addImm(0U)
             .addMetadata(DI->getVariable())
             .addMetadata(Expr);
-    } else if (const auto *CF = dyn_cast<ConstantFP>(V)) {
+      return true;
+    }
+    if (const auto *CF = dyn_cast<ConstantFP>(V)) {
       BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, II)
           .addFPImm(CF)
           .addImm(0U)
           .addMetadata(DI->getVariable())
           .addMetadata(DI->getExpression());
-    } else if (Register Reg = lookUpRegForValue(V)) {
+      return true;
+    }
+    if (Register Reg = lookUpRegForValue(V)) {
       // FIXME: This does not handle register-indirect values at offset 0.
       if (!FuncInfo.MF->useDebugInstrRef()) {
         bool IsIndirect = false;
         BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD.getDL(), II, IsIndirect,
                 Reg, DI->getVariable(), DI->getExpression());
-      } else {
-        // If using instruction referencing, produce this as a DBG_INSTR_REF,
-        // to be later patched up by finalizeDebugInstrRefs.
-        SmallVector<MachineOperand, 1> MOs({MachineOperand::CreateReg(
-            /* Reg */ Reg, /* isDef */ false, /* isImp */ false,
-            /* isKill */ false, /* isDead */ false,
-            /* isUndef */ false, /* isEarlyClobber */ false,
-            /* SubReg */ 0, /* isDebug */ true)});
-        SmallVector<uint64_t, 2> Ops({dwarf::DW_OP_LLVM_arg, 0});
-        auto *NewExpr = DIExpression::prependOpcodes(DI->getExpression(), Ops);
-        BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD.getDL(),
-                TII.get(TargetOpcode::DBG_INSTR_REF), /*IsIndirect*/ false, MOs,
-                DI->getVariable(), NewExpr);
+        return true;
       }
-    } else {
-      // We don't know how to handle other cases, so we drop.
-      LLVM_DEBUG(dbgs() << "Dropping debug info for " << *DI << "\n");
+      // If using instruction referencing, produce this as a DBG_INSTR_REF,
+      // to be later patched up by finalizeDebugInstrRefs.
+      SmallVector<MachineOperand, 1> MOs({MachineOperand::CreateReg(
+          /* Reg */ Reg, /* isDef */ false, /* isImp */ false,
+          /* isKill */ false, /* isDead */ false,
+          /* isUndef */ false, /* isEarlyClobber */ false,
+          /* SubReg */ 0, /* isDebug */ true)});
+      SmallVector<uint64_t, 2> Ops({dwarf::DW_OP_LLVM_arg, 0});
+      auto *NewExpr = DIExpression::prependOpcodes(DI->getExpression(), Ops);
+      BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD.getDL(),
+              TII.get(TargetOpcode::DBG_INSTR_REF), /*IsIndirect*/ false, MOs,
+              DI->getVariable(), NewExpr);
+      return true;
     }
+    // We don't know how to handle other cases, so we drop.
+    LLVM_DEBUG(dbgs() << "Dropping debug info for " << *DI << "\n");
     return true;
   }
   case Intrinsic::dbg_label: {