Skip to content

Commit

Permalink
[M68k] Add MC support for bchg, bclr and bset instruction
Browse files Browse the repository at this point in the history 
Reviewed By: myhsu

Differential Revision: https://reviews.llvm.org/D116993
  • Loading branch information
@tclin914
tclin914 committed Aug 19, 2023
1 parent 8ee710a commit 974c639
Show file tree
Hide file tree
Showing 4 changed files with 332 additions and 59 deletions.
160 changes: 101 additions & 59 deletions llvm/lib/Target/M68k/M68kInstrBits.td
View file
Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@
///
/// Machine:
///
/// BCHG [ ] BCLR [ ] BSET [ ] BTST [~]
/// BCHG [~] BCLR [~] BSET [~] BTST [~]
///
/// Map:
///
Expand All @@ -30,92 +30,134 @@
/// ------------+---------+---------+---------+---------
/// F E D C | B A 9 | 8 7 6 | 5 4 3 | 2 1 0
/// ------------+---------+---------+---------+---------
/// 0 0 0 0 | REG | 1 0 0 | MODE | REG
/// 0 0 0 0 | REG | OP MODE | MODE | REG
/// ------------+---------+---------+---------+---------
class MxBTSTEnc_R<MxEncMemOp dst_enc, string bitno_name> {
class MxBITEnc_R<bits<3> opmode, MxEncMemOp dst_enc, string bitno_name> {
dag Value = (ascend
(descend 0b0000,
(operand "$"#bitno_name, 3),
0b100, dst_enc.EA
opmode, dst_enc.EA
),
dst_enc.Supplement
);
}

/// -------------------------------+---------+---------
/// F E D C B A 9 8 . 7 6 | 5 4 3 | 2 1 0
/// -------------------------------+---------+---------
/// 0 0 0 0 1 0 0 0 . 0 0 | MODE | REG
/// ------------------------+------+---------+---------
/// ---------------------+---------+---------+---------
/// F E D C B A 9 | 8 7 6 | 5 4 3 | 2 1 0
/// ---------------------+---------+---------+---------
/// 0 0 0 0 1 0 0 | OP MODE | MODE | REG
/// ---------------------+--+------+---------+---------
/// 0 0 0 0 0 0 0 0 | BIT NUMBER
/// ------------------------+--------------------------
class MxBTSTEnc_I<MxEncMemOp dst_enc, string bitno_name> {
class MxBITEnc_I<bits<3> opmode, MxEncMemOp dst_enc, string bitno_name> {
dag Value = (ascend
(descend 0b0000100000, dst_enc.EA),
(descend 0b0000100, opmode, dst_enc.EA),
(descend 0b00000000, (operand "$"#bitno_name, 8)),
dst_enc.Supplement
);
}

let Defs = [CCR] in {
class MxBTST_RR<MxType TYPE>
: MxInst<(outs), (ins TYPE.ROp:$dst, TYPE.ROp:$bitno), "btst\t$bitno, $dst",
[(set CCR, (MxBtst TYPE.VT:$dst, TYPE.VT:$bitno))]> {
let Inst = MxBTSTEnc_R<MxEncAddrMode_r<"dst">, "bitno">.Value;
class MxBIT_RR<string MN, bits<3> OPMODE, MxType TYPE>
: MxInst<(outs), (ins TYPE.ROp:$dst, TYPE.ROp:$bitno),
MN#"\t$bitno, $dst"> {
let Inst = MxBITEnc_R<OPMODE, MxEncAddrMode_r<"dst">, "bitno">.Value;
}

class MxBTST_RI<MxType TYPE>
: MxInst<(outs), (ins TYPE.ROp:$dst, TYPE.IOp:$bitno), "btst\t$bitno, $dst",
[(set CCR, (MxBtst TYPE.VT:$dst, TYPE.IPat:$bitno))]> {
let Inst = MxBTSTEnc_I<MxEncAddrMode_r<"dst">, "bitno">.Value;
class MxBIT_RI<string MN, bits<3> OPMODE, MxType TYPE>
: MxInst<(outs), (ins TYPE.ROp:$dst, TYPE.IOp:$bitno),
MN#"\t$bitno, $dst"> {
let Inst = MxBITEnc_I<OPMODE, MxEncAddrMode_r<"dst">, "bitno">.Value;
}

class MxBTST_MR<MxType TYPE, MxOperand MEMOpd, ComplexPattern MEMPat,
MxEncMemOp DST_ENC>
: MxInst<(outs), (ins MEMOpd:$dst, TYPE.ROp:$bitno), "btst\t$bitno, $dst",
[(set CCR, (MxBtst (TYPE.Load MEMPat:$dst), TYPE.VT:$bitno))]> {
let Inst = MxBTSTEnc_R<DST_ENC, "bitno">.Value;
class MxBIT_MR<string MN, bits<3> OPMODE, MxType TYPE,
MxOperand MEMOpd, MxEncMemOp DST_ENC>
: MxInst<(outs), (ins MEMOpd:$dst, TYPE.ROp:$bitno),
MN#"\t$bitno, $dst"> {
let Inst = MxBITEnc_R<OPMODE, DST_ENC, "bitno">.Value;
}

class MxBTST_MI<MxType TYPE, MxOperand MEMOpd, ComplexPattern MEMPat,
MxEncMemOp DST_ENC>
: MxInst<(outs), (ins MEMOpd:$dst, TYPE.IOp:$bitno), "btst\t$bitno, $dst",
[(set CCR, (MxBtst (TYPE.Load MEMPat:$dst), TYPE.IPat:$bitno))]> {
let Inst = MxBTSTEnc_I<DST_ENC, "bitno">.Value;
class MxBIT_MI<string MN, bits<3> OPMODE, MxType TYPE,
MxOperand MEMOpd, MxEncMemOp DST_ENC>
: MxInst<(outs), (ins MEMOpd:$dst, TYPE.IOp:$bitno),
MN#"\t$bitno, $dst"> {
let Inst = MxBITEnc_I<OPMODE, DST_ENC, "bitno">.Value;
}
} // Defs = [CCR]

// Register BTST limited to 32 bits only
def BTST32dd : MxBTST_RR<MxType32d>;
def BTST32di : MxBTST_RI<MxType32d>;

// Memory BTST limited to 8 bits only
def BTST8jd : MxBTST_MR<MxType8d, MxType8.JOp, MxType8.JPat,
MxEncAddrMode_j<"dst">>;
def BTST8od : MxBTST_MR<MxType8d, MxType8.OOp, MxType8.OPat,
MxEncAddrMode_o<"dst">>;
def BTST8ed : MxBTST_MR<MxType8d, MxType8.EOp, MxType8.EPat,
MxEncAddrMode_e<"dst">>;
def BTST8pd : MxBTST_MR<MxType8d, MxType8.POp, MxType8.PPat,
MxEncAddrMode_p<"dst">>;
def BTST8fd : MxBTST_MR<MxType8d, MxType8.FOp, MxType8.FPat,
MxEncAddrMode_f<"dst">>;
def BTST8qd : MxBTST_MR<MxType8d, MxType8.QOp, MxType8.QPat,
def BTST8qd : MxBIT_MR<"btst", 0b100, MxType8d, MxType8.QOp,
MxEncAddrMode_q<"dst">>;
def BTST8kd : MxBTST_MR<MxType8d, MxType8.KOp, MxType8.KPat,
def BTST8kd : MxBIT_MR<"btst", 0b100, MxType8d, MxType8.KOp,
MxEncAddrMode_k<"dst">>;

def BTST8ji : MxBTST_MI<MxType8d, MxType8.JOp, MxType8.JPat,
MxEncAddrMode_j<"dst">>;
def BTST8oi : MxBTST_MI<MxType8d, MxType8.OOp, MxType8.OPat,
MxEncAddrMode_o<"dst">>;
def BTST8ei : MxBTST_MI<MxType8d, MxType8.EOp, MxType8.EPat,
MxEncAddrMode_e<"dst">>;
def BTST8pi : MxBTST_MI<MxType8d, MxType8.POp, MxType8.PPat,
MxEncAddrMode_p<"dst">>;
def BTST8fi : MxBTST_MI<MxType8d, MxType8.FOp, MxType8.FPat,
MxEncAddrMode_f<"dst">>;
def BTST8qi : MxBTST_MI<MxType8d, MxType8.QOp, MxType8.QPat,
def BTST8qi : MxBIT_MI<"btst", 0b000, MxType8d, MxType8.QOp,
MxEncAddrMode_q<"dst">>;
def BTST8ki : MxBTST_MI<MxType8d, MxType8.KOp, MxType8.KPat,
def BTST8ki : MxBIT_MI<"btst", 0b000, MxType8d, MxType8.KOp,
MxEncAddrMode_k<"dst">>;

multiclass MxBIT<string MN, bits<3> OP, bits<3> OPI> {
// Register Bit manipulation limited to 32 bits only
def NAME#32dd : MxBIT_RR<MN, OP, MxType32d>;
def NAME#32di : MxBIT_RI<MN, OPI, MxType32d>;

// Memory Bit manipulation limited to 8 bits only
def NAME#8jd : MxBIT_MR<MN, OP, MxType8d,
MxType8.JOp, MxEncAddrMode_j<"dst">>;
def NAME#8od : MxBIT_MR<MN, OP, MxType8d,
MxType8.OOp, MxEncAddrMode_o<"dst">>;
def NAME#8ed : MxBIT_MR<MN, OP, MxType8d,
MxType8.EOp, MxEncAddrMode_e<"dst">>;
def NAME#8pd : MxBIT_MR<MN, OP, MxType8d,
MxType8.POp, MxEncAddrMode_p<"dst">>;
def NAME#8fd : MxBIT_MR<MN, OP, MxType8d,
MxType8.FOp, MxEncAddrMode_f<"dst">>;

def NAME#8ji : MxBIT_MI<MN, OPI, MxType8d,
MxType8.JOp, MxEncAddrMode_j<"dst">>;
def NAME#8oi : MxBIT_MI<MN, OPI, MxType8d,
MxType8.OOp, MxEncAddrMode_o<"dst">>;
def NAME#8ei : MxBIT_MI<MN, OPI, MxType8d,
MxType8.EOp, MxEncAddrMode_e<"dst">>;
def NAME#8pi : MxBIT_MI<MN, OPI, MxType8d,
MxType8.POp, MxEncAddrMode_p<"dst">>;
def NAME#8fi : MxBIT_MI<MN, OPI, MxType8d,
MxType8.FOp, MxEncAddrMode_f<"dst">>;
}

defm BCHG : MxBIT<"bchg", 0b101, 0b001>;
defm BCLR : MxBIT<"bclr", 0b110, 0b010>;
defm BSET : MxBIT<"bset", 0b111, 0b011>;
defm BTST : MxBIT<"btst", 0b100, 0b000>;

// Codegen patterns

multiclass MxBITPatR<MxInst INSTd, MxInst INSTi, SDNode NODE> {
def : Pat<(NODE MxType32d.VT:$dst, MxType32d.VT:$bitno),
(INSTd MxType32d.ROp:$dst, MxType32d.ROp:$bitno)>;
def : Pat<(NODE MxType32d.VT:$dst, MxType32d.IPat:$bitno),
(INSTi MxType32d.ROp:$dst, MxType32d.IOp:$bitno)>;
}

defm : MxBITPatR<BTST32dd, BTST32di, MxBtst>;

multiclass MxBITPatM<MxInst INSTd, MxInst INSTi, SDNode NODE, MxType TYPE,
MxOperand MEMOpd, ComplexPattern MEMPat> {
def : Pat<(NODE (TYPE.Load MEMPat:$dst), TYPE.VT:$bitno),
(INSTd MEMOpd:$dst, TYPE.ROp:$bitno)>;
def : Pat<(NODE (TYPE.Load MEMPat:$dst), TYPE.IPat:$bitno),
(INSTi MEMOpd:$dst, TYPE.IOp:$bitno)>;
}

defm : MxBITPatM<BTST8qd, BTST8qi, MxBtst,
MxType8d, MxType8.QOp, MxType8.QPat>;
defm : MxBITPatM<BTST8kd, BTST8ki, MxBtst,
MxType8d, MxType8.KOp, MxType8.KPat>;
defm : MxBITPatM<BTST8jd, BTST8ji, MxBtst,
MxType8d, MxType8.JOp, MxType8.JPat>;
defm : MxBITPatM<BTST8od, BTST8oi, MxBtst,
MxType8d, MxType8.OOp, MxType8.OPat>;
defm : MxBITPatM<BTST8ed, BTST8ei, MxBtst,
MxType8d, MxType8.EOp, MxType8.EPat>;
defm : MxBITPatM<BTST8pd, BTST8pi, MxBtst,
MxType8d, MxType8.POp, MxType8.PPat>;
defm : MxBITPatM<BTST8fd, BTST8fi, MxBtst,
MxType8d, MxType8.FOp, MxType8.FPat>;
105 changes: 105 additions & 0 deletions llvm/test/MC/M68k/Bits/Classes/MxBTST_MI.s
View file
Original file line number Diff line number Diff line change
@@ -1,33 +1,138 @@
; RUN: llvm-mc -triple=m68k -show-encoding %s | FileCheck %s

; CHECK: bchg #0, (%a1)
; CHECK-SAME: encoding: [0x08,0x51,0x00,0x00]
bchg #0, (%a1)
; CHECK: bchg #-1, (%a0)
; CHECK-SAME: encoding: [0x08,0x50,0x00,0xff]
bchg #-1, (%a0)

; CHECK: bclr #0, (%a1)
; CHECK-SAME: encoding: [0x08,0x91,0x00,0x00]
bclr #0, (%a1)
; CHECK: bclr #-1, (%a0)
; CHECK-SAME: encoding: [0x08,0x90,0x00,0xff]
bclr #-1, (%a0)

; CHECK: bset #0, (%a1)
; CHECK-SAME: encoding: [0x08,0xd1,0x00,0x00]
bset #0, (%a1)
; CHECK: bset #-1, (%a0)
; CHECK-SAME: encoding: [0x08,0xd0,0x00,0xff]
bset #-1, (%a0)

; CHECK: btst #0, (%a1)
; CHECK-SAME: encoding: [0x08,0x11,0x00,0x00]
btst #0, (%a1)
; CHECK: btst #-1, (%a0)
; CHECK-SAME: encoding: [0x08,0x10,0x00,0xff]
btst #-1, (%a0)

; CHECK: bchg #0, (%a1)+
; CHECK-SAME: encoding: [0x08,0x59,0x00,0x00]
bchg #0, (%a1)+
; CHECK: bchg #-1, (%a0)+
; CHECK-SAME: encoding: [0x08,0x58,0x00,0xff]
bchg #-1, (%a0)+

; CHECK: bclr #0, (%a1)+
; CHECK-SAME: encoding: [0x08,0x99,0x00,0x00]
bclr #0, (%a1)+
; CHECK: bclr #-1, (%a0)+
; CHECK-SAME: encoding: [0x08,0x98,0x00,0xff]
bclr #-1, (%a0)+

; CHECK: bset #0, (%a1)+
; CHECK-SAME: encoding: [0x08,0xd9,0x00,0x00]
bset #0, (%a1)+
; CHECK: bset #-1, (%a0)+
; CHECK-SAME: encoding: [0x08,0xd8,0x00,0xff]
bset #-1, (%a0)+

; CHECK: btst #0, (%a1)+
; CHECK-SAME: encoding: [0x08,0x19,0x00,0x00]
btst #0, (%a1)+
; CHECK: btst #-1, (%a0)+
; CHECK-SAME: encoding: [0x08,0x18,0x00,0xff]
btst #-1, (%a0)+

; CHECK: bchg #0, -(%a1)
; CHECK-SAME: encoding: [0x08,0x61,0x00,0x00]
bchg #0, -(%a1)
; CHECK: bchg #-1, -(%a0)
; CHECK-SAME: encoding: [0x08,0x60,0x00,0xff]
bchg #-1, -(%a0)

; CHECK: bclr #0, -(%a1)
; CHECK-SAME: encoding: [0x08,0xa1,0x00,0x00]
bclr #0, -(%a1)
; CHECK: bclr #-1, -(%a0)
; CHECK-SAME: encoding: [0x08,0xa0,0x00,0xff]
bclr #-1, -(%a0)

; CHECK: bset #0, -(%a1)
; CHECK-SAME: encoding: [0x08,0xe1,0x00,0x00]
bset #0, -(%a1)
; CHECK: bset #-1, -(%a0)
; CHECK-SAME: encoding: [0x08,0xe0,0x00,0xff]
bset #-1, -(%a0)

; CHECK: btst #0, -(%a1)
; CHECK-SAME: encoding: [0x08,0x21,0x00,0x00]
btst #0, -(%a1)
; CHECK: btst #-1, -(%a0)
; CHECK-SAME: encoding: [0x08,0x20,0x00,0xff]
btst #-1, -(%a0)

; CHECK: bchg #0, (-1,%a1)
; CHECK-SAME: encoding: [0x08,0x69,0x00,0x00,0xff,0xff]
bchg #0, (-1,%a1)
; CHECK: bchg #-1, (0,%a0)
; CHECK-SAME: encoding: [0x08,0x68,0x00,0xff,0x00,0x00]
bchg #-1, (0,%a0)

; CHECK: bclr #0, (-1,%a1)
; CHECK-SAME: encoding: [0x08,0xa9,0x00,0x00,0xff,0xff]
bclr #0, (-1,%a1)
; CHECK: bclr #-1, (0,%a0)
; CHECK-SAME: encoding: [0x08,0xa8,0x00,0xff,0x00,0x00]
bclr #-1, (0,%a0)

; CHECK: bset #0, (-1,%a1)
; CHECK-SAME: encoding: [0x08,0xe9,0x00,0x00,0xff,0xff]
bset #0, (-1,%a1)
; CHECK: bset #-1, (0,%a0)
; CHECK-SAME: encoding: [0x08,0xe8,0x00,0xff,0x00,0x00]
bset #-1, (0,%a0)

; CHECK: btst #0, (-1,%a1)
; CHECK-SAME: encoding: [0x08,0x29,0x00,0x00,0xff,0xff]
btst #0, (-1,%a1)
; CHECK: btst #-1, (0,%a0)
; CHECK-SAME: encoding: [0x08,0x28,0x00,0xff,0x00,0x00]
btst #-1, (0,%a0)

; CHECK: bchg #0, (-1,%a1,%a0)
; CHECK-SAME: encoding: [0x08,0x71,0x00,0x00,0x88,0xff]
bchg #0, (-1,%a1,%a0)
; CHECK: bchg #-1, (0,%a0,%a0)
; CHECK-SAME: encoding: [0x08,0x70,0x00,0xff,0x88,0x00]
bchg #-1, (0,%a0,%a0)

; CHECK: bclr #0, (-1,%a1,%a0)
; CHECK-SAME: encoding: [0x08,0xb1,0x00,0x00,0x88,0xff]
bclr #0, (-1,%a1,%a0)
; CHECK: bclr #-1, (0,%a0,%a0)
; CHECK-SAME: encoding: [0x08,0xb0,0x00,0xff,0x88,0x00]
bclr #-1, (0,%a0,%a0)

; CHECK: bset #0, (-1,%a1,%a0)
; CHECK-SAME: encoding: [0x08,0xf1,0x00,0x00,0x88,0xff]
bset #0, (-1,%a1,%a0)
; CHECK: bset #-1, (0,%a0,%a0)
; CHECK-SAME: encoding: [0x08,0xf0,0x00,0xff,0x88,0x00]
bset #-1, (0,%a0,%a0)

; CHECK: btst #0, (-1,%a1,%a0)
; CHECK-SAME: encoding: [0x08,0x31,0x00,0x00,0x88,0xff]
btst #0, (-1,%a1,%a0)
Expand Down
Loading

0 comments on commit 974c639

Please sign in to comment.