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[RISCV] Simplify the definitions of interrupt CSRs
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For `CSR_Interrupt`, we can generate the register list via a single
`sequence`.

For `CSR_XLEN_F32_Interrupt` and `CSR_XLEN_F64_Interrupt`, I don't
see the reason why we need to keep the order the same as how we used
to allocate registers (and we have changed the order in D146488), so
I fold them into one `sequence`.

There are some *.ll changes because of the order change.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D154837
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wangpc-pp committed Jul 11, 2023
1 parent 299b2c2 commit 99809f4
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Showing 3 changed files with 485 additions and 510 deletions.
35 changes: 5 additions & 30 deletions llvm/lib/Target/RISCV/RISCVCallingConv.td
Expand Up @@ -29,37 +29,12 @@ def CSR_NoRegs : CalleeSavedRegs<(add)>;

// Interrupt handler needs to save/restore all registers that are used,
// both Caller and Callee saved registers.
def CSR_Interrupt : CalleeSavedRegs<(add X1,
(sequence "X%u", 3, 9),
(sequence "X%u", 10, 11),
(sequence "X%u", 12, 17),
(sequence "X%u", 18, 27),
(sequence "X%u", 28, 31))>;
def CSR_Interrupt : CalleeSavedRegs<(add X1, (sequence "X%u", 3, 31))>;

// Same as CSR_Interrupt, but including all 32-bit FP registers.
def CSR_XLEN_F32_Interrupt: CalleeSavedRegs<(add X1,
(sequence "X%u", 3, 9),
(sequence "X%u", 10, 11),
(sequence "X%u", 12, 17),
(sequence "X%u", 18, 27),
(sequence "X%u", 28, 31),
(sequence "F%u_F", 0, 7),
(sequence "F%u_F", 10, 11),
(sequence "F%u_F", 12, 17),
(sequence "F%u_F", 28, 31),
(sequence "F%u_F", 8, 9),
(sequence "F%u_F", 18, 27))>;
def CSR_XLEN_F32_Interrupt: CalleeSavedRegs<(add CSR_Interrupt,
(sequence "F%u_F", 0, 31))>;

// Same as CSR_Interrupt, but including all 64-bit FP registers.
def CSR_XLEN_F64_Interrupt: CalleeSavedRegs<(add X1,
(sequence "X%u", 3, 9),
(sequence "X%u", 10, 11),
(sequence "X%u", 12, 17),
(sequence "X%u", 18, 27),
(sequence "X%u", 28, 31),
(sequence "F%u_D", 0, 7),
(sequence "F%u_D", 10, 11),
(sequence "F%u_D", 12, 17),
(sequence "F%u_D", 28, 31),
(sequence "F%u_D", 8, 9),
(sequence "F%u_D", 18, 27))>;
def CSR_XLEN_F64_Interrupt: CalleeSavedRegs<(add CSR_Interrupt,
(sequence "F%u_D", 0, 31))>;
192 changes: 96 additions & 96 deletions llvm/test/CodeGen/RISCV/interrupt-attr-nocall.ll
Expand Up @@ -437,30 +437,30 @@ define void @foo_double() nounwind #0 {
; CHECK-RV32IF-NEXT: fsw ft5, 104(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw ft6, 100(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw ft7, 96(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fa0, 92(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fa1, 88(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fa2, 84(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fa3, 80(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fa4, 76(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fa5, 72(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fa6, 68(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fa7, 64(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw ft8, 60(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw ft9, 56(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw ft10, 52(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw ft11, 48(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs0, 44(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs1, 40(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs2, 36(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs3, 32(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs4, 28(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs5, 24(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs6, 20(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs7, 16(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs8, 12(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs9, 8(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs10, 4(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs11, 0(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs0, 92(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs1, 88(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fa0, 84(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fa1, 80(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fa2, 76(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fa3, 72(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fa4, 68(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fa5, 64(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fa6, 60(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fa7, 56(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs2, 52(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs3, 48(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs4, 44(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs5, 40(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs6, 36(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs7, 32(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs8, 28(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs9, 24(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs10, 20(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs11, 16(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw ft8, 12(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw ft9, 8(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw ft10, 4(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw ft11, 0(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: lui a1, %hi(h)
; CHECK-RV32IF-NEXT: lw a0, %lo(h)(a1)
; CHECK-RV32IF-NEXT: lw a1, %lo(h+4)(a1)
Expand Down Expand Up @@ -495,30 +495,30 @@ define void @foo_double() nounwind #0 {
; CHECK-RV32IF-NEXT: flw ft5, 104(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft6, 100(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft7, 96(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa0, 92(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa1, 88(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa2, 84(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa3, 80(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa4, 76(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa5, 72(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa6, 68(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa7, 64(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft8, 60(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft9, 56(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft10, 52(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft11, 48(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs0, 44(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs1, 40(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs2, 36(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs3, 32(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs4, 28(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs5, 24(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs6, 20(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs7, 16(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs8, 12(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs9, 8(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs10, 4(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs11, 0(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs0, 92(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs1, 88(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa0, 84(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa1, 80(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa2, 76(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa3, 72(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa4, 68(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa5, 64(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa6, 60(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa7, 56(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs2, 52(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs3, 48(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs4, 44(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs5, 40(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs6, 36(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs7, 32(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs8, 28(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs9, 24(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs10, 20(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs11, 16(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft8, 12(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft9, 8(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft10, 4(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft11, 0(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: addi sp, sp, 192
; CHECK-RV32IF-NEXT: mret
;
Expand Down Expand Up @@ -630,30 +630,30 @@ define void @foo_fp_double() nounwind #1 {
; CHECK-RV32IF-NEXT: fsw ft5, 116(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw ft6, 112(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw ft7, 108(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fa0, 104(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fa1, 100(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fa2, 96(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fa3, 92(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fa4, 88(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fa5, 84(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fa6, 80(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fa7, 76(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw ft8, 72(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw ft9, 68(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw ft10, 64(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw ft11, 60(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs0, 56(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs1, 52(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs2, 48(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs3, 44(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs4, 40(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs5, 36(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs6, 32(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs7, 28(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs8, 24(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs9, 20(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs10, 16(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs11, 12(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs0, 104(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs1, 100(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fa0, 96(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fa1, 92(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fa2, 88(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fa3, 84(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fa4, 80(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fa5, 76(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fa6, 72(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fa7, 68(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs2, 64(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs3, 60(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs4, 56(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs5, 52(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs6, 48(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs7, 44(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs8, 40(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs9, 36(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs10, 32(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw fs11, 28(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw ft8, 24(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw ft9, 20(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw ft10, 16(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw ft11, 12(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: addi s0, sp, 208
; CHECK-RV32IF-NEXT: lui a1, %hi(h)
; CHECK-RV32IF-NEXT: lw a0, %lo(h)(a1)
Expand Down Expand Up @@ -690,30 +690,30 @@ define void @foo_fp_double() nounwind #1 {
; CHECK-RV32IF-NEXT: flw ft5, 116(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft6, 112(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft7, 108(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa0, 104(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa1, 100(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa2, 96(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa3, 92(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa4, 88(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa5, 84(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa6, 80(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa7, 76(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft8, 72(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft9, 68(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft10, 64(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft11, 60(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs0, 56(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs1, 52(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs2, 48(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs3, 44(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs4, 40(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs5, 36(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs6, 32(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs7, 28(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs8, 24(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs9, 20(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs10, 16(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs11, 12(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs0, 104(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs1, 100(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa0, 96(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa1, 92(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa2, 88(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa3, 84(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa4, 80(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa5, 76(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa6, 72(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa7, 68(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs2, 64(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs3, 60(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs4, 56(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs5, 52(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs6, 48(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs7, 44(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs8, 40(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs9, 36(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs10, 32(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs11, 28(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft8, 24(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft9, 20(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft10, 16(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft11, 12(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: addi sp, sp, 208
; CHECK-RV32IF-NEXT: mret
;
Expand Down

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