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[DemandedBits] Print function name when printing analysis.
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Include the function name + analysis when printing the analysis for
testing.
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@fhahn
fhahn committed Jul 6, 2023
1 parent d4f43e4 commit 99b3b8e
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Showing 5 changed files with 25 additions and 3 deletions.
1 change: 1 addition & 0 deletions llvm/lib/Analysis/DemandedBits.cpp
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Expand Up @@ -477,6 +477,7 @@ void DemandedBits::print(raw_ostream &OS) {
OS << *I << '\n';
};

OS << "Printing analysis 'Demanded Bits Analysis' for function '" << F.getName() << "':\n";
performAnalysis();
for (auto &KV : AliveBits) {
Instruction *I = KV.first;
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1 change: 1 addition & 0 deletions llvm/test/Analysis/DemandedBits/add.ll
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@@ -1,5 +1,6 @@
; RUN: opt -S -disable-output -passes="print<demanded-bits>" < %s 2>&1 | FileCheck %s

; CHECK-LABEL: Printing analysis 'Demanded Bits Analysis' for function 'test_add':
; CHECK-DAG: DemandedBits: 0x1e for %1 = and i32 %a, 9
; CHECK-DAG: DemandedBits: 0x1a for %2 = and i32 %b, 9
; CHECK-DAG: DemandedBits: 0x1a for %3 = and i32 %c, 13
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3 changes: 2 additions & 1 deletion llvm/test/Analysis/DemandedBits/basic.ll
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@@ -1,5 +1,6 @@
; RUN: opt -S -disable-output -passes="print<demanded-bits>" < %s 2>&1 | FileCheck %s


; CHECK-LABEL: Printing analysis 'Demanded Bits Analysis' for function 'test_mul':
; CHECK-DAG: DemandedBits: 0xff for %1 = add nsw i32 %a, 5
; CHECK-DAG: DemandedBits: 0xff for %3 = trunc i32 %2 to i8
; CHECK-DAG: DemandedBits: 0xff for %2 = mul nsw i32 %1, %b
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12 changes: 10 additions & 2 deletions llvm/test/Analysis/DemandedBits/intrinsics.ll
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@@ -1,7 +1,8 @@
; RUN: opt -S -disable-output -passes="print<demanded-bits>" < %s 2>&1 | FileCheck %s

; CHECK-LABEL: Printing analysis 'Demanded Bits Analysis' for function 'test_bswap':
; CHECK-DAG: DemandedBits: 0xff000000 for %1 = or i32 %x, 1
; CHECK-DAG: DemandedBits: 0xff for %2 = call i32 @llvm.bitreverse.i32(i32 %1)
; CHECK-DAG: DemandedBits: 0xff for %2 = call i32 @llvm.bswap.i32(i32 %1)
; CHECK-DAG: DemandedBits: 0xff for %3 = trunc i32 %2 to i8
define i8 @test_bswap(i32 %x) {
%1 = or i32 %x, 1
Expand All @@ -11,8 +12,9 @@ define i8 @test_bswap(i32 %x) {
}
declare i32 @llvm.bswap.i32(i32)

; CHECK-LABEL: Printing analysis 'Demanded Bits Analysis' for function 'test_bitreverse':
; CHECK-DAG: DemandedBits: 0xff000000 for %1 = or i32 %x, 1
; CHECK-DAG: DemandedBits: 0xff for %2 = call i32 @llvm.bswap.i32(i32 %1)
; CHECK-DAG: DemandedBits: 0xff for %2 = call i32 @llvm.bitreverse.i32(i32 %1)
; CHECK-DAG: DemandedBits: 0xff for %3 = trunc i32 %2 to i8
define i8 @test_bitreverse(i32 %x) {
%1 = or i32 %x, 1
Expand All @@ -26,6 +28,7 @@ declare i32 @llvm.bitreverse.i32(i32)
declare i32 @llvm.fshl.i32(i32, i32, i32)
declare i33 @llvm.fshr.i33(i33, i33, i33)

; CHECK-LABEL: Printing analysis 'Demanded Bits Analysis' for function 'test_fshl':
; CHECK-DAG: DemandedBits: 0xff for %x2 = or i32 %x, 1
; CHECK-DAG: DemandedBits: 0xff000000 for %y2 = or i32 %y, 1
; CHECK-DAG: DemandedBits: 0xffff for %z = call i32 @llvm.fshl.i32(i32 %x2, i32 %y2, i32 8)
Expand All @@ -38,6 +41,7 @@ define i32 @test_fshl(i32 %x, i32 %y) {
ret i32 %r
}

; CHECK-LABEL: Printing analysis 'Demanded Bits Analysis' for function 'test_fshr':
; CHECK-DAG: DemandedBits: 0xff for %x2 = or i33 %x, 1
; CHECK-DAG: DemandedBits: 0x1fe000000 for %y2 = or i33 %y, 1
; CHECK-DAG: DemandedBits: 0xffff for %z = call i33 @llvm.fshr.i33(i33 %x2, i33 %y2, i33 25)
Expand All @@ -50,6 +54,7 @@ define i33 @test_fshr(i33 %x, i33 %y) {
ret i33 %r
}

; CHECK-LABEL: Printing analysis 'Demanded Bits Analysis' for function 'test_fshl_zero_shift':
; CHECK-DAG: DemandedBits: 0xffff for %x2 = or i32 %x, 1
; CHECK-DAG: DemandedBits: 0x0 for %y2 = or i32 %y, 1
; CHECK-DAG: DemandedBits: 0xffff for %z = call i32 @llvm.fshl.i32(i32 %x2, i32 %y2, i32 0)
Expand All @@ -62,6 +67,7 @@ define i32 @test_fshl_zero_shift(i32 %x, i32 %y) {
ret i32 %r
}

; CHECK-LABEL: Printing analysis 'Demanded Bits Analysis' for function 'test_fshr_full_shift':
; CHECK-DAG: DemandedBits: 0x0 for %x2 = or i33 %x, 1
; CHECK-DAG: DemandedBits: 0xffff for %y2 = or i33 %y, 1
; CHECK-DAG: DemandedBits: 0xffff for %z = call i33 @llvm.fshr.i33(i33 %x2, i33 %y2, i33 33)
Expand All @@ -74,6 +80,7 @@ define i33 @test_fshr_full_shift(i33 %x, i33 %y) {
ret i33 %r
}

; CHECK-LABEL: Printing analysis 'Demanded Bits Analysis' for function 'test_fshl_pow2_bitwidth':
; CHECK-DAG: DemandedBits: 0xffffffff for %x2 = or i32 %x, 1
; CHECK-DAG: DemandedBits: 0xffffffff for %y2 = or i32 %y, 1
; CHECK-DAG: DemandedBits: 0x1f for %z2 = or i32 %z, 1
Expand All @@ -88,6 +95,7 @@ define i32 @test_fshl_pow2_bitwidth(i32 %x, i32 %y, i32 %z) {
ret i32 %r
}

; CHECK-LABEL: Printing analysis 'Demanded Bits Analysis' for function 'test_fshr_non_pow2_bitwidth':
; CHECK-DAG: DemandedBits: 0x1ffffffff for %x2 = or i33 %x, 1
; CHECK-DAG: DemandedBits: 0x1ffffffff for %y2 = or i33 %y, 1
; CHECK-DAG: DemandedBits: 0x1ffffffff for %z2 = or i33 %z, 1
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11 changes: 11 additions & 0 deletions llvm/test/Analysis/DemandedBits/vectors.ll
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Original file line number Diff line number Diff line change
@@ -1,5 +1,6 @@
; RUN: opt -S -disable-output -passes="print<demanded-bits>" < %s 2>&1 | FileCheck %s

; CHECK-LABEL: Printing analysis 'Demanded Bits Analysis' for function 'test_basic':
; CHECK-DAG: DemandedBits: 0xff00 for %x = or <2 x i32> %a, zeroinitializer
; CHECK-DAG: DemandedBits: 0xff00 for %y = or <2 x i32> %b, zeroinitializer
; CHECK-DAG: DemandedBits: 0xff00 for %z = or <2 x i32> %x, %y
Expand All @@ -16,6 +17,7 @@ define <2 x i8> @test_basic(<2 x i32> %a, <2 x i32> %b) {

; Vector-specific instructions

; CHECK-LABEL: Printing analysis 'Demanded Bits Analysis' for function 'test_extractelement':
; CHECK-DAG: DemandedBits: 0xff for %x = or <2 x i32> %a, zeroinitializer
; CHECK-DAG: DemandedBits: 0xf0 for %z = extractelement <2 x i32> %x, i32 1
; CHECK-DAG: DemandedBits: 0xf for %y = extractelement <2 x i32> %x, i32 0
Expand All @@ -32,6 +34,7 @@ define i32 @test_extractelement(<2 x i32> %a) {
ret i32 %r
}

; CHECK-LABEL: Printing analysis 'Demanded Bits Analysis' for function 'test_insertelement':
; CHECK-DAG: DemandedBits: 0xff for %x = or i32 %a, 0
; CHECK-DAG: DemandedBits: 0xff for %y = or i32 %b, 0
; CHECK-DAG: DemandedBits: 0xff for %z = insertelement <2 x i32> undef, i32 %x, i32 0
Expand All @@ -46,6 +49,7 @@ define <2 x i32> @test_insertelement(i32 %a, i32 %b) {
ret <2 x i32> %r
}

; CHECK-LABEL: Printing analysis 'Demanded Bits Analysis' for function 'test_shufflevector':
; CHECK-DAG: DemandedBits: 0xff for %x = or <2 x i32> %a, zeroinitializer
; CHECK-DAG: DemandedBits: 0xff for %y = or <2 x i32> %b, zeroinitializer
; CHECK-DAG: DemandedBits: 0xff for %z = shufflevector <2 x i32> %x, <2 x i32> %y, <3 x i32> <i32 0, i32 3, i32 1>
Expand All @@ -60,6 +64,7 @@ define <3 x i32> @test_shufflevector(<2 x i32> %a, <2 x i32> %b) {

; Shifts with splat shift amounts

; CHECK-LABEL: Printing analysis 'Demanded Bits Analysis' for function 'test_shl':
; CHECK-DAG: DemandedBits: 0xf for %x = or <2 x i32> %a, zeroinitializer
; CHECK-DAG: DemandedBits: 0xf0 for %y = shl <2 x i32> %x, <i32 4, i32 4>
; CHECK-DAG: DemandedBits: 0xffffffff for %r = and <2 x i32> %y, <i32 240, i32 240>
Expand All @@ -70,6 +75,7 @@ define <2 x i32> @test_shl(<2 x i32> %a) {
ret <2 x i32> %r
}

; CHECK-LABEL: Printing analysis 'Demanded Bits Analysis' for function 'test_ashr':
; CHECK-DAG: DemandedBits: 0xf00 for %x = or <2 x i32> %a, zeroinitializer
; CHECK-DAG: DemandedBits: 0xf0 for %y = ashr <2 x i32> %x, <i32 4, i32 4>
; CHECK-DAG: DemandedBits: 0xffffffff for %r = and <2 x i32> %y, <i32 240, i32 240>
Expand All @@ -80,6 +86,7 @@ define <2 x i32> @test_ashr(<2 x i32> %a) {
ret <2 x i32> %r
}

; CHECK-LABEL: Printing analysis 'Demanded Bits Analysis' for function 'test_lshr':
; CHECK-DAG: DemandedBits: 0xf00 for %x = or <2 x i32> %a, zeroinitializer
; CHECK-DAG: DemandedBits: 0xf0 for %y = lshr <2 x i32> %x, <i32 4, i32 4>
; CHECK-DAG: DemandedBits: 0xffffffff for %r = and <2 x i32> %y, <i32 240, i32 240>
Expand All @@ -93,6 +100,7 @@ define <2 x i32> @test_lshr(<2 x i32> %a) {
declare <2 x i32> @llvm.fshl.i32(<2 x i32>, <2 x i32>, <2 x i32>)
declare <2 x i32> @llvm.fshr.i32(<2 x i32>, <2 x i32>, <2 x i32>)

; CHECK-LABEL: Printing analysis 'Demanded Bits Analysis' for function 'test_fshl':
; CHECK-DAG: DemandedBits: 0xf for %x = or <2 x i32> %a, zeroinitializer
; CHECK-DAG: DemandedBits: 0xf0000000 for %y = or <2 x i32> %b, zeroinitializer
; CHECK-DAG: DemandedBits: 0xff for %z = call <2 x i32> @llvm.fshl.v2i32(<2 x i32> %x, <2 x i32> %y, <2 x i32> <i32 4, i32 4>)
Expand All @@ -105,6 +113,7 @@ define <2 x i32> @test_fshl(<2 x i32> %a, <2 x i32> %b) {
ret <2 x i32> %r
}

; CHECK-LABEL: Printing analysis 'Demanded Bits Analysis' for function 'test_fshr':
; CHECK-DAG: DemandedBits: 0xf for %x = or <2 x i32> %a, zeroinitializer
; CHECK-DAG: DemandedBits: 0xf0000000 for %y = or <2 x i32> %b, zeroinitializer
; CHECK-DAG: DemandedBits: 0xff for %z = call <2 x i32> @llvm.fshr.v2i32(<2 x i32> %x, <2 x i32> %y, <2 x i32> <i32 28, i32 28>)
Expand All @@ -119,13 +128,15 @@ define <2 x i32> @test_fshr(<2 x i32> %a, <2 x i32> %b) {

; FP / Int conversion. These have different input / output types.

; CHECK-LABEL: Printing analysis 'Demanded Bits Analysis' for function 'test_uitofp':
; CHECK-DAG: DemandedBits: 0xffffffff for %x = or <2 x i32> %a, zeroinitializer
define <2 x float> @test_uitofp(<2 x i32> %a) {
%x = or <2 x i32> %a, zeroinitializer
%r = uitofp <2 x i32> %x to <2 x float>
ret <2 x float> %r
}

; CHECK-LABEL: Printing analysis 'Demanded Bits Analysis' for function 'test_fptoui':
; CHECK-DAG: DemandedBits: 0xffffffff for %y = fptoui <2 x float> %x to <2 x i32>
define <2 x i32> @test_fptoui(<2 x float> %a) {
%x = fadd <2 x float> %a, <float 1.0, float 1.0>
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