[GlobalISel][X86_64] Support for G_FPTOSI

Differential Revision: https://reviews.llvm.org/D49183 llvm-svn: 341200
llvm · Aug 31, 2018 · 9b0b492 · 9b0b492
1 parent 58a5d6f
commit 9b0b492
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Showing 5 changed files with 906 additions and 3 deletions.
diff --git a/llvm/lib/Target/X86/X86LegalizerInfo.cpp b/llvm/lib/Target/X86/X86LegalizerInfo.cpp
@@ -219,6 +219,13 @@ void X86LegalizerInfo::setLegalizerInfo64bit() {
       .clampScalar(0, s32, s64)
       .widenScalarToNextPow2(0);
 
+  getActionDefinitionsBuilder(G_FPTOSI)
+      .legalForCartesianProduct({s32, s64})
+      .clampScalar(1, s32, s64)
+      .widenScalarToNextPow2(0)
+      .clampScalar(0, s32, s64)
+      .widenScalarToNextPow2(1);
+
   // Comparison
   setAction({G_ICMP, 1, s64}, Legal);
 

diff --git a/llvm/lib/Target/X86/X86RegisterBankInfo.cpp b/llvm/lib/Target/X86/X86RegisterBankInfo.cpp
@@ -198,15 +198,19 @@ X86RegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
     // Instruction having only floating-point operands (all scalars in VECRReg)
     getInstrPartialMappingIdxs(MI, MRI, /* isFP */ true, OpRegBankIdx);
     break;
-  case TargetOpcode::G_SITOFP: {
+  case TargetOpcode::G_SITOFP:
+  case TargetOpcode::G_FPTOSI: {
     // Some of the floating-point instructions have mixed GPR and FP operands:
     // fine-tune the computed mapping.
     auto &Op0 = MI.getOperand(0);
     auto &Op1 = MI.getOperand(1);
     const LLT Ty0 = MRI.getType(Op0.getReg());
     const LLT Ty1 = MRI.getType(Op1.getReg());
-    OpRegBankIdx[0] = getPartialMappingIdx(Ty0, /* isFP */ true);
-    OpRegBankIdx[1] = getPartialMappingIdx(Ty1, /* isFP */ false);
+
+    bool FirstArgIsFP = Opc == TargetOpcode::G_SITOFP;
+    bool SecondArgIsFP = Opc == TargetOpcode::G_FPTOSI;
+    OpRegBankIdx[0] = getPartialMappingIdx(Ty0, /* isFP */ FirstArgIsFP);
+    OpRegBankIdx[1] = getPartialMappingIdx(Ty1, /* isFP */ SecondArgIsFP);
     break;
   }
   case TargetOpcode::G_FCMP: {

diff --git a/llvm/test/CodeGen/X86/GlobalISel/regbankselect-X86_64.mir b/llvm/test/CodeGen/X86/GlobalISel/regbankselect-X86_64.mir
@@ -266,6 +266,54 @@
     ret double %conv
   }
 
+  define signext i8 @float_to_int8(float %val) {
+  entry:
+    %conv = fptosi float %val to i8
+    ret i8 %conv
+  }
+
+  define signext i16 @float_to_int16(float %val) {
+  entry:
+    %conv = fptosi float %val to i16
+    ret i16 %conv
+  }
+
+  define i32 @float_to_int32(float %val) {
+  entry:
+    %conv = fptosi float %val to i32
+    ret i32 %conv
+  }
+
+  define i64 @float_to_int64(float %val) {
+  entry:
+    %conv = fptosi float %val to i64
+    ret i64 %conv
+  }
+
+  define signext i8 @double_to_int8(double %val) {
+  entry:
+    %conv = fptosi double %val to i8
+    ret i8 %conv
+  }
+
+  define signext i16 @double_to_int16(double %val) {
+  entry:
+    %conv = fptosi double %val to i16
+    ret i16 %conv
+  }
+
+  define i32 @double_to_int32(double %val) {
+  entry:
+    %conv = fptosi double %val to i32
+    ret i32 %conv
+  }
+
+  define i64 @double_to_int64(double %val) {
+  entry:
+    %conv = fptosi double %val to i64
+    ret i64 %conv
+  }
+
   define i1 @fcmp_float_oeq(float %x, float %y) {
     %1 = fcmp oeq float %x, %y
     ret i1 %1
@@ -2118,6 +2166,294 @@ body:             |
     $xmm0 = COPY %2(s128)
     RET 0, implicit $xmm0
 
+...
+---
+name:            float_to_int8
+alignment:       4
+legalized:       true
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: _ }
+  - { id: 1, class: _ }
+  - { id: 2, class: _ }
+  - { id: 3, class: _ }
+body:             |
+  bb.1.entry:
+    liveins: $xmm0
+
+    ; FAST-LABEL: name: float_to_int8
+    ; FAST: liveins: $xmm0
+    ; FAST: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+    ; FAST: [[TRUNC:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY]](s128)
+    ; FAST: [[FPTOSI:%[0-9]+]]:gpr(s32) = G_FPTOSI [[TRUNC]](s32)
+    ; FAST: [[TRUNC1:%[0-9]+]]:gpr(s8) = G_TRUNC [[FPTOSI]](s32)
+    ; FAST: $al = COPY [[TRUNC1]](s8)
+    ; FAST: RET 0, implicit $al
+    ; GREEDY-LABEL: name: float_to_int8
+    ; GREEDY: liveins: $xmm0
+    ; GREEDY: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+    ; GREEDY: [[TRUNC:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY]](s128)
+    ; GREEDY: [[FPTOSI:%[0-9]+]]:gpr(s32) = G_FPTOSI [[TRUNC]](s32)
+    ; GREEDY: [[TRUNC1:%[0-9]+]]:gpr(s8) = G_TRUNC [[FPTOSI]](s32)
+    ; GREEDY: $al = COPY [[TRUNC1]](s8)
+    ; GREEDY: RET 0, implicit $al
+    %1:_(s128) = COPY $xmm0
+    %0:_(s32) = G_TRUNC %1(s128)
+    %3:_(s32) = G_FPTOSI %0(s32)
+    %2:_(s8) = G_TRUNC %3(s32)
+    $al = COPY %2(s8)
+    RET 0, implicit $al
+
+...
+---
+name:            float_to_int16
+alignment:       4
+legalized:       true
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: _ }
+  - { id: 1, class: _ }
+  - { id: 2, class: _ }
+  - { id: 3, class: _ }
+body:             |
+  bb.1.entry:
+    liveins: $xmm0
+
+    ; FAST-LABEL: name: float_to_int16
+    ; FAST: liveins: $xmm0
+    ; FAST: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+    ; FAST: [[TRUNC:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY]](s128)
+    ; FAST: [[FPTOSI:%[0-9]+]]:gpr(s32) = G_FPTOSI [[TRUNC]](s32)
+    ; FAST: [[TRUNC1:%[0-9]+]]:gpr(s16) = G_TRUNC [[FPTOSI]](s32)
+    ; FAST: $ax = COPY [[TRUNC1]](s16)
+    ; FAST: RET 0, implicit $ax
+    ; GREEDY-LABEL: name: float_to_int16
+    ; GREEDY: liveins: $xmm0
+    ; GREEDY: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+    ; GREEDY: [[TRUNC:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY]](s128)
+    ; GREEDY: [[FPTOSI:%[0-9]+]]:gpr(s32) = G_FPTOSI [[TRUNC]](s32)
+    ; GREEDY: [[TRUNC1:%[0-9]+]]:gpr(s16) = G_TRUNC [[FPTOSI]](s32)
+    ; GREEDY: $ax = COPY [[TRUNC1]](s16)
+    ; GREEDY: RET 0, implicit $ax
+    %1:_(s128) = COPY $xmm0
+    %0:_(s32) = G_TRUNC %1(s128)
+    %3:_(s32) = G_FPTOSI %0(s32)
+    %2:_(s16) = G_TRUNC %3(s32)
+    $ax = COPY %2(s16)
+    RET 0, implicit $ax
+
+...
+---
+name:            float_to_int32
+alignment:       4
+legalized:       true
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: _ }
+  - { id: 1, class: _ }
+  - { id: 2, class: _ }
+body:             |
+  bb.1.entry:
+    liveins: $xmm0
+
+    ; FAST-LABEL: name: float_to_int32
+    ; FAST: liveins: $xmm0
+    ; FAST: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+    ; FAST: [[TRUNC:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY]](s128)
+    ; FAST: [[FPTOSI:%[0-9]+]]:gpr(s32) = G_FPTOSI [[TRUNC]](s32)
+    ; FAST: $eax = COPY [[FPTOSI]](s32)
+    ; FAST: RET 0, implicit $eax
+    ; GREEDY-LABEL: name: float_to_int32
+    ; GREEDY: liveins: $xmm0
+    ; GREEDY: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+    ; GREEDY: [[TRUNC:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY]](s128)
+    ; GREEDY: [[FPTOSI:%[0-9]+]]:gpr(s32) = G_FPTOSI [[TRUNC]](s32)
+    ; GREEDY: $eax = COPY [[FPTOSI]](s32)
+    ; GREEDY: RET 0, implicit $eax
+    %1:_(s128) = COPY $xmm0
+    %0:_(s32) = G_TRUNC %1(s128)
+    %2:_(s32) = G_FPTOSI %0(s32)
+    $eax = COPY %2(s32)
+    RET 0, implicit $eax
+
+...
+---
+name:            float_to_int64
+alignment:       4
+legalized:       true
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: _ }
+  - { id: 1, class: _ }
+  - { id: 2, class: _ }
+body:             |
+  bb.1.entry:
+    liveins: $xmm0
+
+    ; FAST-LABEL: name: float_to_int64
+    ; FAST: liveins: $xmm0
+    ; FAST: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+    ; FAST: [[TRUNC:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY]](s128)
+    ; FAST: [[FPTOSI:%[0-9]+]]:gpr(s64) = G_FPTOSI [[TRUNC]](s32)
+    ; FAST: $rax = COPY [[FPTOSI]](s64)
+    ; FAST: RET 0, implicit $rax
+    ; GREEDY-LABEL: name: float_to_int64
+    ; GREEDY: liveins: $xmm0
+    ; GREEDY: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+    ; GREEDY: [[TRUNC:%[0-9]+]]:vecr(s32) = G_TRUNC [[COPY]](s128)
+    ; GREEDY: [[FPTOSI:%[0-9]+]]:gpr(s64) = G_FPTOSI [[TRUNC]](s32)
+    ; GREEDY: $rax = COPY [[FPTOSI]](s64)
+    ; GREEDY: RET 0, implicit $rax
+    %1:_(s128) = COPY $xmm0
+    %0:_(s32) = G_TRUNC %1(s128)
+    %2:_(s64) = G_FPTOSI %0(s32)
+    $rax = COPY %2(s64)
+    RET 0, implicit $rax
+
+...
+---
+name:            double_to_int8
+alignment:       4
+legalized:       true
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: _ }
+  - { id: 1, class: _ }
+  - { id: 2, class: _ }
+  - { id: 3, class: _ }
+body:             |
+  bb.1.entry:
+    liveins: $xmm0
+
+    ; FAST-LABEL: name: double_to_int8
+    ; FAST: liveins: $xmm0
+    ; FAST: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+    ; FAST: [[TRUNC:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY]](s128)
+    ; FAST: [[FPTOSI:%[0-9]+]]:gpr(s32) = G_FPTOSI [[TRUNC]](s64)
+    ; FAST: [[TRUNC1:%[0-9]+]]:gpr(s8) = G_TRUNC [[FPTOSI]](s32)
+    ; FAST: $al = COPY [[TRUNC1]](s8)
+    ; FAST: RET 0, implicit $al
+    ; GREEDY-LABEL: name: double_to_int8
+    ; GREEDY: liveins: $xmm0
+    ; GREEDY: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+    ; GREEDY: [[TRUNC:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY]](s128)
+    ; GREEDY: [[FPTOSI:%[0-9]+]]:gpr(s32) = G_FPTOSI [[TRUNC]](s64)
+    ; GREEDY: [[TRUNC1:%[0-9]+]]:gpr(s8) = G_TRUNC [[FPTOSI]](s32)
+    ; GREEDY: $al = COPY [[TRUNC1]](s8)
+    ; GREEDY: RET 0, implicit $al
+    %1:_(s128) = COPY $xmm0
+    %0:_(s64) = G_TRUNC %1(s128)
+    %3:_(s32) = G_FPTOSI %0(s64)
+    %2:_(s8) = G_TRUNC %3(s32)
+    $al = COPY %2(s8)
+    RET 0, implicit $al
+
+...
+---
+name:            double_to_int16
+alignment:       4
+legalized:       true
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: _ }
+  - { id: 1, class: _ }
+  - { id: 2, class: _ }
+  - { id: 3, class: _ }
+body:             |
+  bb.1.entry:
+    liveins: $xmm0
+
+    ; FAST-LABEL: name: double_to_int16
+    ; FAST: liveins: $xmm0
+    ; FAST: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+    ; FAST: [[TRUNC:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY]](s128)
+    ; FAST: [[FPTOSI:%[0-9]+]]:gpr(s32) = G_FPTOSI [[TRUNC]](s64)
+    ; FAST: [[TRUNC1:%[0-9]+]]:gpr(s16) = G_TRUNC [[FPTOSI]](s32)
+    ; FAST: $ax = COPY [[TRUNC1]](s16)
+    ; FAST: RET 0, implicit $ax
+    ; GREEDY-LABEL: name: double_to_int16
+    ; GREEDY: liveins: $xmm0
+    ; GREEDY: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+    ; GREEDY: [[TRUNC:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY]](s128)
+    ; GREEDY: [[FPTOSI:%[0-9]+]]:gpr(s32) = G_FPTOSI [[TRUNC]](s64)
+    ; GREEDY: [[TRUNC1:%[0-9]+]]:gpr(s16) = G_TRUNC [[FPTOSI]](s32)
+    ; GREEDY: $ax = COPY [[TRUNC1]](s16)
+    ; GREEDY: RET 0, implicit $ax
+    %1:_(s128) = COPY $xmm0
+    %0:_(s64) = G_TRUNC %1(s128)
+    %3:_(s32) = G_FPTOSI %0(s64)
+    %2:_(s16) = G_TRUNC %3(s32)
+    $ax = COPY %2(s16)
+    RET 0, implicit $ax
+
+...
+---
+name:            double_to_int32
+alignment:       4
+legalized:       true
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: _ }
+  - { id: 1, class: _ }
+  - { id: 2, class: _ }
+body:             |
+  bb.1.entry:
+    liveins: $xmm0
+
+    ; FAST-LABEL: name: double_to_int32
+    ; FAST: liveins: $xmm0
+    ; FAST: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+    ; FAST: [[TRUNC:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY]](s128)
+    ; FAST: [[FPTOSI:%[0-9]+]]:gpr(s32) = G_FPTOSI [[TRUNC]](s64)
+    ; FAST: $eax = COPY [[FPTOSI]](s32)
+    ; FAST: RET 0, implicit $eax
+    ; GREEDY-LABEL: name: double_to_int32
+    ; GREEDY: liveins: $xmm0
+    ; GREEDY: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+    ; GREEDY: [[TRUNC:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY]](s128)
+    ; GREEDY: [[FPTOSI:%[0-9]+]]:gpr(s32) = G_FPTOSI [[TRUNC]](s64)
+    ; GREEDY: $eax = COPY [[FPTOSI]](s32)
+    ; GREEDY: RET 0, implicit $eax
+    %1:_(s128) = COPY $xmm0
+    %0:_(s64) = G_TRUNC %1(s128)
+    %2:_(s32) = G_FPTOSI %0(s64)
+    $eax = COPY %2(s32)
+    RET 0, implicit $eax
+
+...
+---
+name:            double_to_int64
+alignment:       4
+legalized:       true
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: _ }
+  - { id: 1, class: _ }
+  - { id: 2, class: _ }
+body:             |
+  bb.1.entry:
+    liveins: $xmm0
+
+    ; FAST-LABEL: name: double_to_int64
+    ; FAST: liveins: $xmm0
+    ; FAST: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+    ; FAST: [[TRUNC:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY]](s128)
+    ; FAST: [[FPTOSI:%[0-9]+]]:gpr(s64) = G_FPTOSI [[TRUNC]](s64)
+    ; FAST: $rax = COPY [[FPTOSI]](s64)
+    ; FAST: RET 0, implicit $rax
+    ; GREEDY-LABEL: name: double_to_int64
+    ; GREEDY: liveins: $xmm0
+    ; GREEDY: [[COPY:%[0-9]+]]:vecr(s128) = COPY $xmm0
+    ; GREEDY: [[TRUNC:%[0-9]+]]:vecr(s64) = G_TRUNC [[COPY]](s128)
+    ; GREEDY: [[FPTOSI:%[0-9]+]]:gpr(s64) = G_FPTOSI [[TRUNC]](s64)
+    ; GREEDY: $rax = COPY [[FPTOSI]](s64)
+    ; GREEDY: RET 0, implicit $rax
+    %1:_(s128) = COPY $xmm0
+    %0:_(s64) = G_TRUNC %1(s128)
+    %2:_(s64) = G_FPTOSI %0(s64)
+    $rax = COPY %2(s64)
+    RET 0, implicit $rax
+
 ...
 ---
 name:            fcmp_float_oeq