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[InstSimplify] Add bitreverse/bswap vector tests
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Shows missing DemandedElts support (PR36319)
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@RKSimon
RKSimon committed Mar 18, 2020
1 parent dc5f982 commit 9c6458e
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Showing 2 changed files with 128 additions and 11 deletions.
64 changes: 58 additions & 6 deletions llvm/test/Transforms/InstSimplify/bitreverse.ll
View file
@@ -1,31 +1,83 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -S -instsimplify | FileCheck %s

declare i32 @llvm.bitreverse.i32(i32)
declare <2 x i32> @llvm.bitreverse.v2i32(<2 x i32>)

; CHECK-LABEL: @test1(
; CHECK: ret i1 false
define i1 @test1(i32 %arg) {
; CHECK-LABEL: @test1(
; CHECK-NEXT: ret i1 false
;
%a = or i32 %arg, 1
%b = call i32 @llvm.bitreverse.i32(i32 %a)
%res = icmp eq i32 %b, 0
ret i1 %res
}

; CHECK-LABEL: @test2(
; CHECK: ret i1 false
define i1 @test1v(<2 x i32> %arg) {
; CHECK-LABEL: @test1v(
; CHECK-NEXT: [[A:%.*]] = or <2 x i32> [[ARG:%.*]], <i32 1, i32 0>
; CHECK-NEXT: [[B:%.*]] = call <2 x i32> @llvm.bitreverse.v2i32(<2 x i32> [[A]])
; CHECK-NEXT: [[C:%.*]] = extractelement <2 x i32> [[B]], i32 0
; CHECK-NEXT: [[RES:%.*]] = icmp eq i32 [[C]], 0
; CHECK-NEXT: ret i1 [[RES]]
;
%a = or <2 x i32> %arg, <i32 1, i32 0>
%b = call <2 x i32> @llvm.bitreverse.v2i32(<2 x i32> %a)
%c = extractelement <2 x i32> %b, i32 0
%res = icmp eq i32 %c, 0
ret i1 %res
}

define i1 @test2(i32 %arg) {
; CHECK-LABEL: @test2(
; CHECK-NEXT: ret i1 false
;
%a = or i32 %arg, 1024
%b = call i32 @llvm.bitreverse.i32(i32 %a)
%res = icmp eq i32 %b, 0
ret i1 %res
}

; CHECK-LABEL: @test3(
; CHECK: ret i1 false
define i1 @test2v(<2 x i32> %arg) {
; CHECK-LABEL: @test2v(
; CHECK-NEXT: [[A:%.*]] = or <2 x i32> [[ARG:%.*]], <i32 0, i32 1024>
; CHECK-NEXT: [[B:%.*]] = call <2 x i32> @llvm.bitreverse.v2i32(<2 x i32> [[A]])
; CHECK-NEXT: [[C:%.*]] = extractelement <2 x i32> [[B]], i32 1
; CHECK-NEXT: [[RES:%.*]] = icmp eq i32 [[C]], 0
; CHECK-NEXT: ret i1 [[RES]]
;
%a = or <2 x i32> %arg, <i32 0, i32 1024>
%b = call <2 x i32> @llvm.bitreverse.v2i32(<2 x i32> %a)
%c = extractelement <2 x i32> %b, i32 1
%res = icmp eq i32 %c, 0
ret i1 %res
}

define i1 @test3(i32 %arg) {
; CHECK-LABEL: @test3(
; CHECK-NEXT: ret i1 false
;
%a = and i32 %arg, 1
%b = call i32 @llvm.bitreverse.i32(i32 %a)
%and = and i32 %b, 1
%res = icmp eq i32 %and, 1
ret i1 %res
}

define i1 @test3v(<2 x i32> %arg) {
; CHECK-LABEL: @test3v(
; CHECK-NEXT: [[A:%.*]] = and <2 x i32> [[ARG:%.*]], <i32 1, i32 -1>
; CHECK-NEXT: [[B:%.*]] = call <2 x i32> @llvm.bitreverse.v2i32(<2 x i32> [[A]])
; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[B]], <i32 1, i32 -1>
; CHECK-NEXT: [[EXT:%.*]] = extractelement <2 x i32> [[AND]], i32 0
; CHECK-NEXT: [[RES:%.*]] = icmp eq i32 [[EXT]], 1
; CHECK-NEXT: ret i1 [[RES]]
;
%a = and <2 x i32> %arg, <i32 1, i32 -1>
%b = call <2 x i32> @llvm.bitreverse.v2i32(<2 x i32> %a)
%and = and <2 x i32> %b, <i32 1, i32 -1>
%ext = extractelement <2 x i32> %and, i32 0
%res = icmp eq i32 %ext, 1
ret i1 %res
}
75 changes: 70 additions & 5 deletions llvm/test/Transforms/InstSimplify/bswap.ll
View file
@@ -1,31 +1,62 @@
; NOTE: Assertions have been autogenerated by update_test_checks.py
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -S -instsimplify | FileCheck %s

declare i16 @llvm.bswap.i16(i16)
declare <2 x i16> @llvm.bswap.v2i16(<2 x i16>)

define i1 @test1(i16 %arg) {
; CHECK-LABEL: @test1(
; CHECK: ret i1 false
; CHECK-NEXT: ret i1 false
;
%a = or i16 %arg, 1
%b = call i16 @llvm.bswap.i16(i16 %a)
%res = icmp eq i16 %b, 0
ret i1 %res
}

define i1 @test1v(<2 x i16> %arg) {
; CHECK-LABEL: @test1v(
; CHECK-NEXT: [[A:%.*]] = or <2 x i16> [[ARG:%.*]], <i16 1, i16 0>
; CHECK-NEXT: [[B:%.*]] = call <2 x i16> @llvm.bswap.v2i16(<2 x i16> [[A]])
; CHECK-NEXT: [[C:%.*]] = extractelement <2 x i16> [[B]], i32 0
; CHECK-NEXT: [[RES:%.*]] = icmp eq i16 [[C]], 0
; CHECK-NEXT: ret i1 [[RES]]
;
%a = or <2 x i16> %arg, <i16 1, i16 0>
%b = call <2 x i16> @llvm.bswap.v2i16(<2 x i16> %a)
%c = extractelement <2 x i16> %b, i32 0
%res = icmp eq i16 %c, 0
ret i1 %res
}

define i1 @test2(i16 %arg) {
; CHECK-LABEL: @test2(
; CHECK: ret i1 false
; CHECK-NEXT: ret i1 false
;
%a = or i16 %arg, 1024
%b = call i16 @llvm.bswap.i16(i16 %a)
%res = icmp eq i16 %b, 0
ret i1 %res
}

define i1 @test2v(<2 x i16> %arg) {
; CHECK-LABEL: @test2v(
; CHECK-NEXT: [[A:%.*]] = or <2 x i16> [[ARG:%.*]], <i16 0, i16 1024>
; CHECK-NEXT: [[B:%.*]] = call <2 x i16> @llvm.bswap.v2i16(<2 x i16> [[A]])
; CHECK-NEXT: [[C:%.*]] = extractelement <2 x i16> [[B]], i32 1
; CHECK-NEXT: [[RES:%.*]] = icmp eq i16 [[C]], 0
; CHECK-NEXT: ret i1 [[RES]]
;
%a = or <2 x i16> %arg, <i16 0, i16 1024>
%b = call <2 x i16> @llvm.bswap.v2i16(<2 x i16> %a)
%c = extractelement <2 x i16> %b, i32 1
%res = icmp eq i16 %c, 0
ret i1 %res
}

define i1 @test3(i16 %arg) {
; CHECK-LABEL: @test3(
; CHECK: ret i1 false
; CHECK-NEXT: ret i1 false
;
%a = and i16 %arg, 1
%b = call i16 @llvm.bswap.i16(i16 %a)
Expand All @@ -34,13 +65,47 @@ define i1 @test3(i16 %arg) {
ret i1 %res
}

define i1 @test3v(<2 x i16> %arg) {
; CHECK-LABEL: @test3v(
; CHECK-NEXT: [[A:%.*]] = and <2 x i16> [[ARG:%.*]], <i16 1, i16 -1>
; CHECK-NEXT: [[B:%.*]] = call <2 x i16> @llvm.bswap.v2i16(<2 x i16> [[A]])
; CHECK-NEXT: [[C:%.*]] = extractelement <2 x i16> [[B]], i32 0
; CHECK-NEXT: [[AND:%.*]] = and i16 [[C]], 1
; CHECK-NEXT: [[RES:%.*]] = icmp eq i16 [[AND]], 1
; CHECK-NEXT: ret i1 [[RES]]
;
%a = and <2 x i16> %arg, <i16 1, i16 -1>
%b = call <2 x i16> @llvm.bswap.v2i16(<2 x i16> %a)
%c = extractelement <2 x i16> %b, i32 0
%and = and i16 %c, 1
%res = icmp eq i16 %and, 1
ret i1 %res
}

define i1 @test4(i16 %arg) {
; CHECK-LABEL: @test4(
; CHECK: ret i1 false
; CHECK-NEXT: ret i1 false
;
%a = and i16 %arg, 511
%b = call i16 @llvm.bswap.i16(i16 %a)
%and = and i16 %b, 256
%res = icmp eq i16 %and, 1
ret i1 %res
}

define i1 @test4v(<2 x i16> %arg) {
; CHECK-LABEL: @test4v(
; CHECK-NEXT: [[A:%.*]] = and <2 x i16> [[ARG:%.*]], <i16 511, i16 511>
; CHECK-NEXT: [[B:%.*]] = call <2 x i16> @llvm.bswap.v2i16(<2 x i16> [[A]])
; CHECK-NEXT: [[AND:%.*]] = and <2 x i16> [[B]], <i16 255, i16 256>
; CHECK-NEXT: [[EXT:%.*]] = extractelement <2 x i16> [[AND]], i32 1
; CHECK-NEXT: [[RES:%.*]] = icmp eq i16 [[EXT]], 1
; CHECK-NEXT: ret i1 [[RES]]
;
%a = and <2 x i16> %arg, <i16 511, i16 511>
%b = call <2 x i16> @llvm.bswap.v2i16(<2 x i16> %a)
%and = and <2 x i16> %b, <i16 255, i16 256>
%ext = extractelement <2 x i16> %and, i32 1
%res = icmp eq i16 %ext, 1
ret i1 %res
}

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