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[RISCV GlobalISel] Adding initial GlobalISel infrastructure
Summary: Add an initial GlobalISel skeleton for RISCV. It can only run ir translator for `ret void`. Patch by Andrew Wei Reviewers: asb, sabuasal, apazos, lenary, simoncook, lewis-revill, edward-jones, rogfer01, xiangzhai, rovka, Petar.Avramovic, mgorny, dsanders Reviewed By: dsanders Subscribers: pzheng, s.egerton, dsanders, hiraditya, rbar, johnrusso, niosHD, kito-cheng, shiva0217, jrtc27, MaskRay, zzheng, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, psnobl, benna, Jim, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D65219 llvm-svn: 369467
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//===-- RISCVCallLowering.cpp - Call lowering -------------------*- C++ -*-===// | ||
// | ||
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | ||
// See https://llvm.org/LICENSE.txt for license information. | ||
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
// | ||
//===----------------------------------------------------------------------===// | ||
// | ||
/// \file | ||
/// This file implements the lowering of LLVM calls to machine code calls for | ||
/// GlobalISel. | ||
// | ||
//===----------------------------------------------------------------------===// | ||
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#include "RISCVCallLowering.h" | ||
#include "RISCVISelLowering.h" | ||
#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h" | ||
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using namespace llvm; | ||
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RISCVCallLowering::RISCVCallLowering(const RISCVTargetLowering &TLI) | ||
: CallLowering(&TLI) {} | ||
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bool RISCVCallLowering::lowerReturn(MachineIRBuilder &MIRBuilder, | ||
const Value *Val, | ||
ArrayRef<Register> VRegs) const { | ||
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MachineInstrBuilder Ret = MIRBuilder.buildInstrNoInsert(RISCV::PseudoRET); | ||
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if (Val != nullptr) { | ||
return false; | ||
} | ||
MIRBuilder.insertInstr(Ret); | ||
return true; | ||
} | ||
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bool RISCVCallLowering::lowerFormalArguments( | ||
MachineIRBuilder &MIRBuilder, const Function &F, | ||
ArrayRef<ArrayRef<Register>> VRegs) const { | ||
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if (F.arg_empty()) | ||
return true; | ||
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return false; | ||
} | ||
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bool RISCVCallLowering::lowerCall(MachineIRBuilder &MIRBuilder, | ||
CallLoweringInfo &Info) const { | ||
return false; | ||
} |
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//===-- RISCVCallLowering.h - Call lowering ---------------------*- C++ -*-===// | ||
// | ||
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | ||
// See https://llvm.org/LICENSE.txt for license information. | ||
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
// | ||
//===----------------------------------------------------------------------===// | ||
// | ||
/// \file | ||
/// This file describes how to lower LLVM calls to machine code calls. | ||
// | ||
//===----------------------------------------------------------------------===// | ||
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#ifndef LLVM_LIB_TARGET_RISCV_RISCVCALLLOWERING_H | ||
#define LLVM_LIB_TARGET_RISCV_RISCVCALLLOWERING_H | ||
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#include "llvm/CodeGen/CallingConvLower.h" | ||
#include "llvm/CodeGen/GlobalISel/CallLowering.h" | ||
#include "llvm/CodeGen/ValueTypes.h" | ||
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namespace llvm { | ||
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class RISCVTargetLowering; | ||
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class RISCVCallLowering : public CallLowering { | ||
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public: | ||
RISCVCallLowering(const RISCVTargetLowering &TLI); | ||
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bool lowerReturn(MachineIRBuilder &MIRBuiler, const Value *Val, | ||
ArrayRef<Register> VRegs) const override; | ||
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bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F, | ||
ArrayRef<ArrayRef<Register>> VRegs) const override; | ||
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bool lowerCall(MachineIRBuilder &MIRBuilder, | ||
CallLoweringInfo &Info) const override; | ||
}; | ||
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} // end namespace llvm | ||
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#endif // LLVM_LIB_TARGET_RISCV_RISCVCALLLOWERING_H |
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//===-- RISCVInstructionSelector.cpp -----------------------------*- C++ -*-==// | ||
// | ||
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | ||
// See https://llvm.org/LICENSE.txt for license information. | ||
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
// | ||
//===----------------------------------------------------------------------===// | ||
/// \file | ||
/// This file implements the targeting of the InstructionSelector class for | ||
/// RISCV. | ||
/// \todo This should be generated by TableGen. | ||
//===----------------------------------------------------------------------===// | ||
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#include "RISCVRegisterBankInfo.h" | ||
#include "RISCVSubtarget.h" | ||
#include "RISCVTargetMachine.h" | ||
#include "llvm/CodeGen/GlobalISel/InstructionSelector.h" | ||
#include "llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h" | ||
#include "llvm/Support/Debug.h" | ||
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#define DEBUG_TYPE "riscv-isel" | ||
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using namespace llvm; | ||
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#define GET_GLOBALISEL_PREDICATE_BITSET | ||
#include "RISCVGenGlobalISel.inc" | ||
#undef GET_GLOBALISEL_PREDICATE_BITSET | ||
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namespace { | ||
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class RISCVInstructionSelector : public InstructionSelector { | ||
public: | ||
RISCVInstructionSelector(const RISCVTargetMachine &TM, | ||
const RISCVSubtarget &STI, | ||
const RISCVRegisterBankInfo &RBI); | ||
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bool select(MachineInstr &I) override; | ||
static const char *getName() { return DEBUG_TYPE; } | ||
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private: | ||
bool selectImpl(MachineInstr &I, CodeGenCoverage &CoverageInfo) const; | ||
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const RISCVSubtarget &STI; | ||
const RISCVInstrInfo &TII; | ||
const RISCVRegisterInfo &TRI; | ||
const RISCVRegisterBankInfo &RBI; | ||
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// FIXME: This is necessary because DAGISel uses "Subtarget->" and GlobalISel | ||
// uses "STI." in the code generated by TableGen. We need to unify the name of | ||
// Subtarget variable. | ||
const RISCVSubtarget *Subtarget = &STI; | ||
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#define GET_GLOBALISEL_PREDICATES_DECL | ||
#include "RISCVGenGlobalISel.inc" | ||
#undef GET_GLOBALISEL_PREDICATES_DECL | ||
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#define GET_GLOBALISEL_TEMPORARIES_DECL | ||
#include "RISCVGenGlobalISel.inc" | ||
#undef GET_GLOBALISEL_TEMPORARIES_DECL | ||
}; | ||
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} // end anonymous namespace | ||
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#define GET_GLOBALISEL_IMPL | ||
#include "RISCVGenGlobalISel.inc" | ||
#undef GET_GLOBALISEL_IMPL | ||
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RISCVInstructionSelector::RISCVInstructionSelector( | ||
const RISCVTargetMachine &TM, const RISCVSubtarget &STI, | ||
const RISCVRegisterBankInfo &RBI) | ||
: InstructionSelector(), STI(STI), TII(*STI.getInstrInfo()), | ||
TRI(*STI.getRegisterInfo()), RBI(RBI), | ||
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#define GET_GLOBALISEL_PREDICATES_INIT | ||
#include "RISCVGenGlobalISel.inc" | ||
#undef GET_GLOBALISEL_PREDICATES_INIT | ||
#define GET_GLOBALISEL_TEMPORARIES_INIT | ||
#include "RISCVGenGlobalISel.inc" | ||
#undef GET_GLOBALISEL_TEMPORARIES_INIT | ||
{ | ||
} | ||
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bool RISCVInstructionSelector::select(MachineInstr &I) { | ||
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if (!isPreISelGenericOpcode(I.getOpcode())) { | ||
// Certain non-generic instructions also need some special handling. | ||
return true; | ||
} | ||
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if (selectImpl(I, *CoverageInfo)) | ||
return true; | ||
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return false; | ||
} | ||
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namespace llvm { | ||
InstructionSelector * | ||
createRISCVInstructionSelector(const RISCVTargetMachine &TM, | ||
RISCVSubtarget &Subtarget, | ||
RISCVRegisterBankInfo &RBI) { | ||
return new RISCVInstructionSelector(TM, Subtarget, RBI); | ||
} | ||
} // end namespace llvm |
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//===-- RISCVLegalizerInfo.cpp ----------------------------------*- C++ -*-===// | ||
// | ||
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | ||
// See https://llvm.org/LICENSE.txt for license information. | ||
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
// | ||
//===----------------------------------------------------------------------===// | ||
/// \file | ||
/// This file implements the targeting of the Machinelegalizer class for RISCV. | ||
/// \todo This should be generated by TableGen. | ||
//===----------------------------------------------------------------------===// | ||
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#include "RISCVLegalizerInfo.h" | ||
#include "llvm/CodeGen/TargetOpcodes.h" | ||
#include "llvm/CodeGen/ValueTypes.h" | ||
#include "llvm/IR/DerivedTypes.h" | ||
#include "llvm/IR/Type.h" | ||
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using namespace llvm; | ||
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RISCVLegalizerInfo::RISCVLegalizerInfo(const RISCVSubtarget &ST) { | ||
computeTables(); | ||
} |
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//===-- RISCVLegalizerInfo.h ------------------------------------*- C++ -*-===// | ||
// | ||
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | ||
// See https://llvm.org/LICENSE.txt for license information. | ||
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
// | ||
//===----------------------------------------------------------------------===// | ||
/// \file | ||
/// This file declares the targeting of the Machinelegalizer class for RISCV. | ||
/// \todo This should be generated by TableGen. | ||
//===----------------------------------------------------------------------===// | ||
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#ifndef LLVM_LIB_TARGET_RISCV_RISCVMACHINELEGALIZER_H | ||
#define LLVM_LIB_TARGET_RISCV_RISCVMACHINELEGALIZER_H | ||
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#include "llvm/CodeGen/GlobalISel/LegalizerInfo.h" | ||
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namespace llvm { | ||
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class RISCVSubtarget; | ||
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/// This class provides the information for the target register banks. | ||
class RISCVLegalizerInfo : public LegalizerInfo { | ||
public: | ||
RISCVLegalizerInfo(const RISCVSubtarget &ST); | ||
}; | ||
} // end namespace llvm | ||
#endif |
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//===-- RISCVRegisterBankInfo.cpp -------------------------------*- C++ -*-===// | ||
// | ||
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | ||
// See https://llvm.org/LICENSE.txt for license information. | ||
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
// | ||
//===----------------------------------------------------------------------===// | ||
/// \file | ||
/// This file implements the targeting of the RegisterBankInfo class for RISCV. | ||
/// \todo This should be generated by TableGen. | ||
//===----------------------------------------------------------------------===// | ||
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#include "RISCVRegisterBankInfo.h" | ||
#include "MCTargetDesc/RISCVMCTargetDesc.h" | ||
#include "llvm/CodeGen/GlobalISel/RegisterBank.h" | ||
#include "llvm/CodeGen/GlobalISel/RegisterBankInfo.h" | ||
#include "llvm/CodeGen/MachineRegisterInfo.h" | ||
#include "llvm/CodeGen/TargetRegisterInfo.h" | ||
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#define GET_TARGET_REGBANK_IMPL | ||
#include "RISCVGenRegisterBank.inc" | ||
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using namespace llvm; | ||
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RISCVRegisterBankInfo::RISCVRegisterBankInfo(const TargetRegisterInfo &TRI) | ||
: RISCVGenRegisterBankInfo() {} |
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//===-- RISCVRegisterBankInfo.h ---------------------------------*- C++ -*-===// | ||
// | ||
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | ||
// See https://llvm.org/LICENSE.txt for license information. | ||
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
// | ||
//===----------------------------------------------------------------------===// | ||
/// \file | ||
/// This file declares the targeting of the RegisterBankInfo class for RISCV. | ||
/// \todo This should be generated by TableGen. | ||
//===----------------------------------------------------------------------===// | ||
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#ifndef LLVM_LIB_TARGET_RISCV_RISCVREGISTERBANKINFO_H | ||
#define LLVM_LIB_TARGET_RISCV_RISCVREGISTERBANKINFO_H | ||
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#include "llvm/CodeGen/GlobalISel/RegisterBankInfo.h" | ||
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#define GET_REGBANK_DECLARATIONS | ||
#include "RISCVGenRegisterBank.inc" | ||
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namespace llvm { | ||
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class TargetRegisterInfo; | ||
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class RISCVGenRegisterBankInfo : public RegisterBankInfo { | ||
protected: | ||
#define GET_TARGET_REGBANK_CLASS | ||
#include "RISCVGenRegisterBank.inc" | ||
}; | ||
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/// This class provides the information for the target register banks. | ||
class RISCVRegisterBankInfo final : public RISCVGenRegisterBankInfo { | ||
public: | ||
RISCVRegisterBankInfo(const TargetRegisterInfo &TRI); | ||
}; | ||
} // end namespace llvm | ||
#endif |
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//=-- RISCVRegisterBank.td - Describe the RISCV Banks --------*- tablegen -*-=// | ||
// | ||
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | ||
// See https://llvm.org/LICENSE.txt for license information. | ||
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
// | ||
//===----------------------------------------------------------------------===// | ||
// | ||
// | ||
//===----------------------------------------------------------------------===// | ||
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/// General Purpose Registers: X. | ||
def GPRRegBank : RegisterBank<"GPRB", [GPR]>; |
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