Fixed typos in tests: s/CHEKC/CHECK/

Reviewers: ilya-biryukov Subscribers: nemanjai, javed.absar, jsji, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D58611 llvm-svn: 354785
llvm · Feb 25, 2019 · a3a3964 · a3a3964
1 parent 42bf2dd
commit a3a3964
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Showing 6 changed files with 6 additions and 6 deletions.
diff --git a/clang/test/CodeGenObjC/dllstorage.m b/clang/test/CodeGenObjC/dllstorage.m
@@ -85,7 +85,7 @@ @interface M : I {
 }
 @end
 
-// CHEKC-FW-DAG: @_OBJC_CLASS_M = external dllimport global i32
+// CHECK-FW-DAG: @_OBJC_CLASS_M = external dllimport global i32
 
 // CHECK-IR-DAG: @"OBJC_IVAR_$_M._ivar" = external dllimport global i32
 

diff --git a/clang/test/CodeGenObjC/gnustep2-category-protocol.m b/clang/test/CodeGenObjC/gnustep2-category-protocol.m
@@ -5,7 +5,7 @@
 // to a protocol in a binary.
 
 // CHECK: @._OBJC_PROTOCOL_Y = global 
-// CHEKC-SAME: section "__objc_protocols", comdat, align 8
+// CHECK-SAME: section "__objc_protocols", comdat, align 8
 
 
 @interface X

diff --git a/llvm/test/CodeGen/AArch64/nonlazybind.ll b/llvm/test/CodeGen/AArch64/nonlazybind.ll
@@ -18,7 +18,7 @@ define void @test_laziness() {
 
 ; CHECK-NORMAL-LABEL: test_laziness:
 ; CHECK-NORMAL: bl _local
-; CHEKC-NORMAL: bl _nonlocal
+; CHECK-NORMAL: bl _nonlocal
 
   call void @local()
   call void @nonlocal()

diff --git a/llvm/test/CodeGen/ARM/cmpxchg.mir b/llvm/test/CodeGen/ARM/cmpxchg.mir
@@ -10,7 +10,7 @@ body: |
     ; CHECK: bb.0:
     ; CHECK:   liveins: $r0_r1, $r4_r5, $r3, $lr
     ; CHECK: bb.1:
-    ; CHEKC:   liveins: $r4_r5, $r3
+    ; CHECK:   liveins: $r4_r5, $r3
     ; CHECK:   $r0_r1 = LDREXD $r3, 14, $noreg
     ; CHECK:   CMPrr killed $r0, $r4, 14, $noreg, implicit-def $cpsr
     ; CHECK:   CMPrr killed $r1, $r5, 0, killed $cpsr, implicit-def $cpsr

diff --git a/llvm/test/CodeGen/ARM/peephole-phi.mir b/llvm/test/CodeGen/ARM/peephole-phi.mir
@@ -44,7 +44,7 @@ body: |
 
 # CHECK-LABEL: name: func1
 # CHECK:    %6:spr = PHI %0, %bb.1, %2, %bb.2
-# CHEKC:    %7:spr = COPY %6
+# CHECK:    %7:spr = COPY %6
 ---
 name: func1
 tracksRegLiveness: true

diff --git a/llvm/test/CodeGen/PowerPC/scavenging.mir b/llvm/test/CodeGen/PowerPC/scavenging.mir
@@ -157,7 +157,7 @@ body: |
 # CHECK: [[REG]] = LIS8 0
 # CHECK: [[REG]] = ORI8 killed [[REG]], 48
 # CHECK: NOP implicit killed [[REG]]
-# CHEKC: [[REG]] = LD{{.*}}(load 8 from %stack.{{[0-9]+}})
+# CHECK: [[REG]] = LD{{.*}}(load 8 from %stack.{{[0-9]+}})
 name: spill_at_begin
 tracksRegLiveness: true
 stack: