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[mlir][NVGPU][NFC] Clean up code structure
* Move passes to `Transforms` directory. * Add `Utils.h` (will be utilized in a subsequent change). Differential Revision: https://reviews.llvm.org/D155427
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add_subdirectory(IR) | ||
add_subdirectory(TransformOps) | ||
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set(LLVM_TARGET_DEFINITIONS Passes.td) | ||
mlir_tablegen(Passes.h.inc -gen-pass-decls -name NVGPU) | ||
mlir_tablegen(Passes.capi.h.inc -gen-pass-capi-header --prefix NVGPU) | ||
mlir_tablegen(Passes.capi.cpp.inc -gen-pass-capi-impl --prefix NVGPU) | ||
add_public_tablegen_target(MLIRNVGPUPassIncGen) | ||
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add_mlir_doc(Passes NVGPUPasses ./ -gen-pass-doc) | ||
add_subdirectory(Transforms) |
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set(LLVM_TARGET_DEFINITIONS Passes.td) | ||
mlir_tablegen(Passes.h.inc -gen-pass-decls -name NVGPU) | ||
mlir_tablegen(Passes.capi.h.inc -gen-pass-capi-header --prefix NVGPU) | ||
mlir_tablegen(Passes.capi.cpp.inc -gen-pass-capi-impl --prefix NVGPU) | ||
add_public_tablegen_target(MLIRNVGPUPassIncGen) | ||
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add_mlir_doc(Passes NVGPUPasses ./ -gen-pass-doc) |
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//===- Utils.h - Transform utilities -----------------------------*- C++-*-===// | ||
// | ||
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | ||
// See https://llvm.org/LICENSE.txt for license information. | ||
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
// | ||
//===----------------------------------------------------------------------===// | ||
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#include "mlir/IR/Operation.h" | ||
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namespace mlir { | ||
namespace nvgpu { | ||
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/// Get the indices that the given load/store operation is operating on. | ||
Operation::operand_range getIndices(Operation *op); | ||
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/// Set the indices that the given load/store operation is operating on. | ||
void setIndices(Operation *op, ArrayRef<Value> indices); | ||
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} // namespace nvgpu | ||
} // namespace mlir |
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//===- Utils.cpp - Transform utilities ------------------------------------===// | ||
// | ||
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | ||
// See https://llvm.org/LICENSE.txt for license information. | ||
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
// | ||
//===----------------------------------------------------------------------===// | ||
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#include "mlir/Dialect/NVGPU/Transforms/Utils.h" | ||
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#include "mlir/Dialect/MemRef/IR/MemRef.h" | ||
#include "mlir/Dialect/NVGPU/IR/NVGPUDialect.h" | ||
#include "mlir/Dialect/Vector/IR/VectorOps.h" | ||
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using namespace mlir; | ||
using namespace mlir::nvgpu; | ||
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Operation::operand_range nvgpu::getIndices(Operation *op) { | ||
if (auto ldmatrixOp = dyn_cast<LdMatrixOp>(op)) | ||
return ldmatrixOp.getIndices(); | ||
if (auto copyOp = dyn_cast<DeviceAsyncCopyOp>(op)) | ||
return copyOp.getDstIndices(); | ||
if (auto loadOp = dyn_cast<memref::LoadOp>(op)) | ||
return loadOp.getIndices(); | ||
if (auto storeOp = dyn_cast<memref::StoreOp>(op)) | ||
return storeOp.getIndices(); | ||
if (auto vectorReadOp = dyn_cast<vector::LoadOp>(op)) | ||
return vectorReadOp.getIndices(); | ||
if (auto vectorStoreOp = dyn_cast<vector::StoreOp>(op)) | ||
return vectorStoreOp.getIndices(); | ||
llvm_unreachable("unsupported op type"); | ||
} | ||
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void nvgpu::setIndices(Operation *op, ArrayRef<Value> indices) { | ||
if (auto ldmatrixOp = dyn_cast<LdMatrixOp>(op)) | ||
return ldmatrixOp.getIndicesMutable().assign(indices); | ||
if (auto copyOp = dyn_cast<DeviceAsyncCopyOp>(op)) | ||
return copyOp.getDstIndicesMutable().assign(indices); | ||
if (auto loadOp = dyn_cast<memref::LoadOp>(op)) | ||
return loadOp.getIndicesMutable().assign(indices); | ||
if (auto storeOp = dyn_cast<memref::StoreOp>(op)) | ||
return storeOp.getIndicesMutable().assign(indices); | ||
if (auto vectorReadOp = dyn_cast<vector::LoadOp>(op)) | ||
return vectorReadOp.getIndicesMutable().assign(indices); | ||
if (auto vectorStoreOp = dyn_cast<vector::StoreOp>(op)) | ||
return vectorStoreOp.getIndicesMutable().assign(indices); | ||
llvm_unreachable("unsupported op type"); | ||
} |
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