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[RISCV][GISEL] Use MO_PLT when Callee is a Global or Symbol (#71982)
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SelectionDAG does the same thing in 74c8364
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@michaelmaitland
michaelmaitland committed Nov 14, 2023
1 parent 7704837 commit a4f77f1
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Showing 22 changed files with 275 additions and 217 deletions.
20 changes: 18 additions & 2 deletions llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
View file
Original file line number Diff line number Diff line change
Expand Up @@ -496,8 +496,24 @@ bool RISCVCallLowering::lowerCall(MachineIRBuilder &MIRBuilder,
// TODO: Support tail calls.
Info.IsTailCall = false;

if (!Info.Callee.isReg())
Info.Callee.setTargetFlags(RISCVII::MO_CALL);
// If the callee is a GlobalAddress or ExternalSymbol and cannot be assumed as
// DSOLocal, then use MO_PLT. Otherwise use MO_CALL.
if (Info.Callee.isGlobal()) {
const GlobalValue *GV = Info.Callee.getGlobal();
unsigned OpFlags = RISCVII::MO_CALL;
if (!getTLI()->getTargetMachine().shouldAssumeDSOLocal(*GV->getParent(),
GV))
OpFlags = RISCVII::MO_PLT;

Info.Callee.setTargetFlags(OpFlags);
} else if (Info.Callee.isSymbol()) {
unsigned OpFlags = RISCVII::MO_CALL;
if (!getTLI()->getTargetMachine().shouldAssumeDSOLocal(
*MF.getFunction().getParent(), nullptr))
OpFlags = RISCVII::MO_PLT;

Info.Callee.setTargetFlags(OpFlags);
}

MachineInstrBuilder Call =
MIRBuilder
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32-ilp32f-common.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -40,7 +40,7 @@ define i32 @caller_double_in_regs() nounwind {
; ILP32-NEXT: $x10 = COPY [[C]](s32)
; ILP32-NEXT: $x11 = COPY [[UV]](s32)
; ILP32-NEXT: $x12 = COPY [[UV1]](s32)
; ILP32-NEXT: PseudoCALL target-flags(riscv-call) @callee_double_in_regs, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
; ILP32-NEXT: PseudoCALL target-flags(riscv-plt) @callee_double_in_regs, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
; ILP32-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; ILP32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; ILP32-NEXT: $x10 = COPY [[COPY]](s32)
Expand All @@ -55,7 +55,7 @@ define i32 @caller_double_in_regs() nounwind {
; ILP32F-NEXT: $x10 = COPY [[C]](s32)
; ILP32F-NEXT: $x11 = COPY [[UV]](s32)
; ILP32F-NEXT: $x12 = COPY [[UV1]](s32)
; ILP32F-NEXT: PseudoCALL target-flags(riscv-call) @callee_double_in_regs, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
; ILP32F-NEXT: PseudoCALL target-flags(riscv-plt) @callee_double_in_regs, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
; ILP32F-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; ILP32F-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; ILP32F-NEXT: $x10 = COPY [[COPY]](s32)
Expand All @@ -79,7 +79,7 @@ define i64 @caller_small_scalar_ret() nounwind {
; ILP32-LABEL: name: caller_small_scalar_ret
; ILP32: bb.1 (%ir-block.0):
; ILP32-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; ILP32-NEXT: PseudoCALL target-flags(riscv-call) @callee_small_scalar_ret, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10, implicit-def $x11
; ILP32-NEXT: PseudoCALL target-flags(riscv-plt) @callee_small_scalar_ret, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10, implicit-def $x11
; ILP32-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; ILP32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; ILP32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
Expand All @@ -92,7 +92,7 @@ define i64 @caller_small_scalar_ret() nounwind {
; ILP32F-LABEL: name: caller_small_scalar_ret
; ILP32F: bb.1 (%ir-block.0):
; ILP32F-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; ILP32F-NEXT: PseudoCALL target-flags(riscv-call) @callee_small_scalar_ret, csr_ilp32f_lp64f, implicit-def $x1, implicit-def $x10, implicit-def $x11
; ILP32F-NEXT: PseudoCALL target-flags(riscv-plt) @callee_small_scalar_ret, csr_ilp32f_lp64f, implicit-def $x1, implicit-def $x10, implicit-def $x11
; ILP32F-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; ILP32F-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; ILP32F-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
Expand Down
30 changes: 15 additions & 15 deletions llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32-ilp32f-ilp32d-common.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -44,7 +44,7 @@ define i32 @caller_i64_in_regs() nounwind {
; ILP32-NEXT: $x10 = COPY [[C]](s32)
; ILP32-NEXT: $x11 = COPY [[UV]](s32)
; ILP32-NEXT: $x12 = COPY [[UV1]](s32)
; ILP32-NEXT: PseudoCALL target-flags(riscv-call) @callee_i64_in_regs, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
; ILP32-NEXT: PseudoCALL target-flags(riscv-plt) @callee_i64_in_regs, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
; ILP32-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; ILP32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; ILP32-NEXT: $x10 = COPY [[COPY]](s32)
Expand All @@ -59,7 +59,7 @@ define i32 @caller_i64_in_regs() nounwind {
; ILP32F-NEXT: $x10 = COPY [[C]](s32)
; ILP32F-NEXT: $x11 = COPY [[UV]](s32)
; ILP32F-NEXT: $x12 = COPY [[UV1]](s32)
; ILP32F-NEXT: PseudoCALL target-flags(riscv-call) @callee_i64_in_regs, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
; ILP32F-NEXT: PseudoCALL target-flags(riscv-plt) @callee_i64_in_regs, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
; ILP32F-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; ILP32F-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; ILP32F-NEXT: $x10 = COPY [[COPY]](s32)
Expand All @@ -74,7 +74,7 @@ define i32 @caller_i64_in_regs() nounwind {
; ILP32D-NEXT: $x10 = COPY [[C]](s32)
; ILP32D-NEXT: $x11 = COPY [[UV]](s32)
; ILP32D-NEXT: $x12 = COPY [[UV1]](s32)
; ILP32D-NEXT: PseudoCALL target-flags(riscv-call) @callee_i64_in_regs, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
; ILP32D-NEXT: PseudoCALL target-flags(riscv-plt) @callee_i64_in_regs, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x10
; ILP32D-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; ILP32D-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; ILP32D-NEXT: $x10 = COPY [[COPY]](s32)
Expand Down Expand Up @@ -162,7 +162,7 @@ define i32 @caller_many_scalars() nounwind {
; ILP32-NEXT: $x15 = COPY [[C4]](s32)
; ILP32-NEXT: $x16 = COPY [[C5]](s32)
; ILP32-NEXT: $x17 = COPY [[UV2]](s32)
; ILP32-NEXT: PseudoCALL target-flags(riscv-call) @callee_many_scalars, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10
; ILP32-NEXT: PseudoCALL target-flags(riscv-plt) @callee_many_scalars, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10
; ILP32-NEXT: ADJCALLSTACKUP 8, 0, implicit-def $x2, implicit $x2
; ILP32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x10
; ILP32-NEXT: $x10 = COPY [[COPY1]](s32)
Expand Down Expand Up @@ -198,7 +198,7 @@ define i32 @caller_many_scalars() nounwind {
; ILP32F-NEXT: $x15 = COPY [[C4]](s32)
; ILP32F-NEXT: $x16 = COPY [[C5]](s32)
; ILP32F-NEXT: $x17 = COPY [[UV2]](s32)
; ILP32F-NEXT: PseudoCALL target-flags(riscv-call) @callee_many_scalars, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10
; ILP32F-NEXT: PseudoCALL target-flags(riscv-plt) @callee_many_scalars, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10
; ILP32F-NEXT: ADJCALLSTACKUP 8, 0, implicit-def $x2, implicit $x2
; ILP32F-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x10
; ILP32F-NEXT: $x10 = COPY [[COPY1]](s32)
Expand Down Expand Up @@ -234,7 +234,7 @@ define i32 @caller_many_scalars() nounwind {
; ILP32D-NEXT: $x15 = COPY [[C4]](s32)
; ILP32D-NEXT: $x16 = COPY [[C5]](s32)
; ILP32D-NEXT: $x17 = COPY [[UV2]](s32)
; ILP32D-NEXT: PseudoCALL target-flags(riscv-call) @callee_many_scalars, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10
; ILP32D-NEXT: PseudoCALL target-flags(riscv-plt) @callee_many_scalars, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10
; ILP32D-NEXT: ADJCALLSTACKUP 8, 0, implicit-def $x2, implicit $x2
; ILP32D-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x10
; ILP32D-NEXT: $x10 = COPY [[COPY1]](s32)
Expand All @@ -261,7 +261,7 @@ define i32 @caller_small_scalar_ret() nounwind {
; ILP32: bb.1 (%ir-block.0):
; ILP32-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 987654321234567
; ILP32-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; ILP32-NEXT: PseudoCALL target-flags(riscv-call) @callee_small_scalar_ret, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10, implicit-def $x11
; ILP32-NEXT: PseudoCALL target-flags(riscv-plt) @callee_small_scalar_ret, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10, implicit-def $x11
; ILP32-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; ILP32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; ILP32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
Expand All @@ -275,7 +275,7 @@ define i32 @caller_small_scalar_ret() nounwind {
; ILP32F: bb.1 (%ir-block.0):
; ILP32F-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 987654321234567
; ILP32F-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; ILP32F-NEXT: PseudoCALL target-flags(riscv-call) @callee_small_scalar_ret, csr_ilp32f_lp64f, implicit-def $x1, implicit-def $x10, implicit-def $x11
; ILP32F-NEXT: PseudoCALL target-flags(riscv-plt) @callee_small_scalar_ret, csr_ilp32f_lp64f, implicit-def $x1, implicit-def $x10, implicit-def $x11
; ILP32F-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; ILP32F-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; ILP32F-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
Expand All @@ -289,7 +289,7 @@ define i32 @caller_small_scalar_ret() nounwind {
; ILP32D: bb.1 (%ir-block.0):
; ILP32D-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 987654321234567
; ILP32D-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; ILP32D-NEXT: PseudoCALL target-flags(riscv-call) @callee_small_scalar_ret, csr_ilp32d_lp64d, implicit-def $x1, implicit-def $x10, implicit-def $x11
; ILP32D-NEXT: PseudoCALL target-flags(riscv-plt) @callee_small_scalar_ret, csr_ilp32d_lp64d, implicit-def $x1, implicit-def $x10, implicit-def $x11
; ILP32D-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; ILP32D-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; ILP32D-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
Expand Down Expand Up @@ -323,7 +323,7 @@ define i32 @caller_small_struct_ret() nounwind {
; ILP32-LABEL: name: caller_small_struct_ret
; ILP32: bb.1 (%ir-block.0):
; ILP32-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; ILP32-NEXT: PseudoCALL target-flags(riscv-call) @callee_small_struct_ret, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10, implicit-def $x11
; ILP32-NEXT: PseudoCALL target-flags(riscv-plt) @callee_small_struct_ret, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10, implicit-def $x11
; ILP32-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; ILP32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; ILP32-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x11
Expand All @@ -335,7 +335,7 @@ define i32 @caller_small_struct_ret() nounwind {
; ILP32F-LABEL: name: caller_small_struct_ret
; ILP32F: bb.1 (%ir-block.0):
; ILP32F-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; ILP32F-NEXT: PseudoCALL target-flags(riscv-call) @callee_small_struct_ret, csr_ilp32f_lp64f, implicit-def $x1, implicit-def $x10, implicit-def $x11
; ILP32F-NEXT: PseudoCALL target-flags(riscv-plt) @callee_small_struct_ret, csr_ilp32f_lp64f, implicit-def $x1, implicit-def $x10, implicit-def $x11
; ILP32F-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; ILP32F-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; ILP32F-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x11
Expand All @@ -347,7 +347,7 @@ define i32 @caller_small_struct_ret() nounwind {
; ILP32D-LABEL: name: caller_small_struct_ret
; ILP32D: bb.1 (%ir-block.0):
; ILP32D-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; ILP32D-NEXT: PseudoCALL target-flags(riscv-call) @callee_small_struct_ret, csr_ilp32d_lp64d, implicit-def $x1, implicit-def $x10, implicit-def $x11
; ILP32D-NEXT: PseudoCALL target-flags(riscv-plt) @callee_small_struct_ret, csr_ilp32d_lp64d, implicit-def $x1, implicit-def $x10, implicit-def $x11
; ILP32D-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; ILP32D-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; ILP32D-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x11
Expand Down Expand Up @@ -404,7 +404,7 @@ define i32 @caller_large_struct_ret() nounwind {
; ILP32-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0
; ILP32-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; ILP32-NEXT: $x10 = COPY [[FRAME_INDEX]](p0)
; ILP32-NEXT: PseudoCALL target-flags(riscv-call) @callee_large_struct_ret, csr_ilp32_lp64, implicit-def $x1, implicit $x10
; ILP32-NEXT: PseudoCALL target-flags(riscv-plt) @callee_large_struct_ret, csr_ilp32_lp64, implicit-def $x1, implicit $x10
; ILP32-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; ILP32-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (dereferenceable load (s32) from %ir.1)
; ILP32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 12
Expand All @@ -419,7 +419,7 @@ define i32 @caller_large_struct_ret() nounwind {
; ILP32F-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0
; ILP32F-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; ILP32F-NEXT: $x10 = COPY [[FRAME_INDEX]](p0)
; ILP32F-NEXT: PseudoCALL target-flags(riscv-call) @callee_large_struct_ret, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10
; ILP32F-NEXT: PseudoCALL target-flags(riscv-plt) @callee_large_struct_ret, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10
; ILP32F-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; ILP32F-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (dereferenceable load (s32) from %ir.1)
; ILP32F-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 12
Expand All @@ -434,7 +434,7 @@ define i32 @caller_large_struct_ret() nounwind {
; ILP32D-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0
; ILP32D-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; ILP32D-NEXT: $x10 = COPY [[FRAME_INDEX]](p0)
; ILP32D-NEXT: PseudoCALL target-flags(riscv-call) @callee_large_struct_ret, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10
; ILP32D-NEXT: PseudoCALL target-flags(riscv-plt) @callee_large_struct_ret, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10
; ILP32D-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; ILP32D-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (dereferenceable load (s32) from %ir.1)
; ILP32D-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 12
Expand Down
6 changes: 3 additions & 3 deletions llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -31,7 +31,7 @@ define i32 @caller_float_in_regs() nounwind {
; RV32I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; RV32I-NEXT: $x10 = COPY [[C]](s32)
; RV32I-NEXT: $x11 = COPY [[C1]](s32)
; RV32I-NEXT: PseudoCALL target-flags(riscv-call) @callee_float_in_regs, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; RV32I-NEXT: PseudoCALL target-flags(riscv-plt) @callee_float_in_regs, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
; RV32I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV32I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; RV32I-NEXT: $x10 = COPY [[COPY]](s32)
Expand Down Expand Up @@ -94,7 +94,7 @@ define i32 @caller_float_on_stack() nounwind {
; RV32I-NEXT: $x15 = COPY [[UV5]](s32)
; RV32I-NEXT: $x16 = COPY [[UV6]](s32)
; RV32I-NEXT: $x17 = COPY [[UV7]](s32)
; RV32I-NEXT: PseudoCALL target-flags(riscv-call) @callee_float_on_stack, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10
; RV32I-NEXT: PseudoCALL target-flags(riscv-plt) @callee_float_on_stack, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10
; RV32I-NEXT: ADJCALLSTACKUP 4, 0, implicit-def $x2, implicit $x2
; RV32I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x10
; RV32I-NEXT: $x10 = COPY [[COPY1]](s32)
Expand All @@ -116,7 +116,7 @@ define i32 @caller_tiny_scalar_ret() nounwind {
; RV32I-LABEL: name: caller_tiny_scalar_ret
; RV32I: bb.1 (%ir-block.0):
; RV32I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
; RV32I-NEXT: PseudoCALL target-flags(riscv-call) @callee_tiny_scalar_ret, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10
; RV32I-NEXT: PseudoCALL target-flags(riscv-plt) @callee_tiny_scalar_ret, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10
; RV32I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
; RV32I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; RV32I-NEXT: $x10 = COPY [[COPY]](s32)
Expand Down

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