[x86] add minimal test for sbb idiom and CPU capabilities; NFC

D116804 proposes to alter codegen on this example based on
CPU tuning, so check a variety of models to confirm it works
as expected. We already have this test mixed in with several
others in another test file, but it seems wasteful to add so
many RUN lines to check this difference over and over again.

llvm/test/CodeGen/X86/sbb-zero-idiom.ll

@@ -0,0 +1,19 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64--                   | FileCheck %s --check-prefixes=CHECK
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=sandybridge | FileCheck %s --check-prefixes=CHECK
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=skylake     | FileCheck %s --check-prefixes=CHECK
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=k8          | FileCheck %s --check-prefixes=CHECK
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=btver1      | FileCheck %s --check-prefixes=CHECK
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=bdver2      | FileCheck %s --check-prefixes=CHECK
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=znver3      | FileCheck %s --check-prefixes=CHECK
+
+define i32 @i32_select_0_or_neg1(i32 %x) {
+; CHECK-LABEL: i32_select_0_or_neg1:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    negl %edi
+; CHECK-NEXT:    sbbl %eax, %eax
+; CHECK-NEXT:    retq
+  %cmp = icmp ne i32 %x, 0
+  %sel = select i1 %cmp, i32 -1, i32 0
+  ret i32 %sel
+}