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llvm-tblgen: Cleanup for each EmitterClass to be invoked by uniform s…
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…ignature.

Differential Revision: https://reviews.llvm.org/D144351
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chapuni committed Mar 21, 2023
1 parent f35064d commit a7e2b74
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Showing 9 changed files with 20 additions and 18 deletions.
3 changes: 2 additions & 1 deletion llvm/utils/TableGen/AsmMatcherEmitter.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -3205,6 +3205,8 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
Record *AsmParser = Target.getAsmParser();
StringRef ClassName = AsmParser->getValueAsString("AsmParserClassName");

emitSourceFileHeader("Assembly Matcher Source Fragment", OS);

// Compute the information on the instructions to match.
AsmMatcherInfo Info(AsmParser, Target, Records);
Info.buildInfo();
Expand Down Expand Up @@ -4005,7 +4007,6 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
namespace llvm {

void EmitAsmMatcher(RecordKeeper &RK, raw_ostream &OS) {
emitSourceFileHeader("Assembly Matcher Source Fragment", OS);
AsmMatcherEmitter(RK).run(OS);
}

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2 changes: 1 addition & 1 deletion llvm/utils/TableGen/AsmWriterEmitter.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1303,6 +1303,7 @@ void AsmWriterEmitter::run(raw_ostream &O) {
std::vector<std::vector<std::string>> TableDrivenOperandPrinters;
unsigned BitsLeft = 0;
unsigned AsmStrBits = 0;
emitSourceFileHeader("Assembly Writer Source Fragment", O);
EmitGetMnemonic(O, TableDrivenOperandPrinters, BitsLeft, AsmStrBits);
EmitPrintInstruction(O, TableDrivenOperandPrinters, BitsLeft, AsmStrBits);
EmitGetRegisterName(O);
Expand All @@ -1312,7 +1313,6 @@ void AsmWriterEmitter::run(raw_ostream &O) {
namespace llvm {

void EmitAsmWriter(RecordKeeper &RK, raw_ostream &OS) {
emitSourceFileHeader("Assembly Writer Source Fragment", OS);
AsmWriterEmitter(RK).run(OS);
}

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6 changes: 3 additions & 3 deletions llvm/utils/TableGen/Attributes.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -18,7 +18,7 @@ namespace {
class Attributes {
public:
Attributes(RecordKeeper &R) : Records(R) {}
void emit(raw_ostream &OS);
void run(raw_ostream &OS);

private:
void emitTargetIndependentNames(raw_ostream &OS);
Expand Down Expand Up @@ -124,7 +124,7 @@ void Attributes::emitAttributeProperties(raw_ostream &OS) {
OS << "#endif\n";
}

void Attributes::emit(raw_ostream &OS) {
void Attributes::run(raw_ostream &OS) {
emitTargetIndependentNames(OS);
emitFnAttrCompatCheck(OS, false);
emitAttributeProperties(OS);
Expand All @@ -133,7 +133,7 @@ void Attributes::emit(raw_ostream &OS) {
namespace llvm {

void EmitAttributes(RecordKeeper &RK, raw_ostream &OS) {
Attributes(RK).emit(OS);
Attributes(RK).run(OS);
}

} // namespace llvm
3 changes: 2 additions & 1 deletion llvm/utils/TableGen/CallingConvEmitter.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -42,6 +42,8 @@ class CallingConvEmitter {
} // End anonymous namespace

void CallingConvEmitter::run(raw_ostream &O) {
emitSourceFileHeader("Calling Convention Implementation Fragment", O);

std::vector<Record *> CCs = Records.getAllDerivedDefinitions("CallingConv");

// Emit prototypes for all of the non-custom CC's so that they can forward ref
Expand Down Expand Up @@ -430,7 +432,6 @@ void CallingConvEmitter::EmitArgRegisterLists(raw_ostream &O) {
namespace llvm {

void EmitCallingConv(RecordKeeper &RK, raw_ostream &OS) {
emitSourceFileHeader("Calling Convention Implementation Fragment", OS);
CallingConvEmitter(RK).run(OS);
}

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3 changes: 2 additions & 1 deletion llvm/utils/TableGen/CodeEmitterGen.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -358,6 +358,8 @@ void CodeEmitterGen::emitInstructionBaseValues(
}

void CodeEmitterGen::run(raw_ostream &o) {
emitSourceFileHeader("Machine Code Emitter", o);

CodeGenTarget Target(Records);
std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");

Expand Down Expand Up @@ -505,7 +507,6 @@ void CodeEmitterGen::run(raw_ostream &o) {
namespace llvm {

void EmitCodeEmitter(RecordKeeper &RK, raw_ostream &OS) {
emitSourceFileHeader("Machine Code Emitter", OS);
CodeEmitterGen(RK).run(OS);
}

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2 changes: 1 addition & 1 deletion llvm/utils/TableGen/DAGISelEmitter.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -125,6 +125,7 @@ struct PatternSortingPredicate {


void DAGISelEmitter::run(raw_ostream &OS) {
Records.startTimer("Parse patterns");
emitSourceFileHeader("DAG Instruction Selector for the " +
CGP.getTargetInfo().getName().str() + " target", OS);

Expand Down Expand Up @@ -190,7 +191,6 @@ void DAGISelEmitter::run(raw_ostream &OS) {
namespace llvm {

void EmitDAGISel(RecordKeeper &RK, raw_ostream &OS) {
RK.startTimer("Parse patterns");
DAGISelEmitter(RK).run(OS);
}

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2 changes: 1 addition & 1 deletion llvm/utils/TableGen/DFAPacketizerEmitter.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -206,6 +206,7 @@ void DFAPacketizerEmitter::createScheduleClasses(unsigned ItineraryIdx,
// Run the worklist algorithm to generate the DFA.
//
void DFAPacketizerEmitter::run(raw_ostream &OS) {
emitSourceFileHeader("Target DFA Packetizer Tables", OS);
OS << "\n"
<< "#include \"llvm/CodeGen/DFAPacketizer.h\"\n";
OS << "namespace llvm {\n";
Expand Down Expand Up @@ -356,7 +357,6 @@ void DFAPacketizerEmitter::emitForItineraries(
namespace llvm {

void EmitDFAPacketizer(RecordKeeper &RK, raw_ostream &OS) {
emitSourceFileHeader("Target DFA Packetizer Tables", OS);
DFAPacketizerEmitter(RK).run(OS);
}

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9 changes: 4 additions & 5 deletions llvm/utils/TableGen/SubtargetEmitter.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -70,7 +70,7 @@ class SubtargetEmitter {
}
};

const CodeGenTarget &TGT;
CodeGenTarget TGT;
RecordKeeper &Records;
CodeGenSchedModels &SchedModels;
std::string Target;
Expand Down Expand Up @@ -128,8 +128,8 @@ class SubtargetEmitter {
void ParseFeaturesFunction(raw_ostream &OS);

public:
SubtargetEmitter(RecordKeeper &R, CodeGenTarget &TGT)
: TGT(TGT), Records(R), SchedModels(TGT.getSchedModels()),
SubtargetEmitter(RecordKeeper &R)
: TGT(R), Records(R), SchedModels(TGT.getSchedModels()),
Target(TGT.getName()) {}

void run(raw_ostream &o);
Expand Down Expand Up @@ -1988,8 +1988,7 @@ void SubtargetEmitter::run(raw_ostream &OS) {
namespace llvm {

void EmitSubtarget(RecordKeeper &RK, raw_ostream &OS) {
CodeGenTarget CGTarget(RK);
SubtargetEmitter(RK, CGTarget).run(OS);
SubtargetEmitter(RK).run(OS);
}

} // end namespace llvm
8 changes: 4 additions & 4 deletions llvm/utils/TableGen/X86FoldTablesEmitter.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -141,7 +141,7 @@ class X86FoldTablesEmitter {
X86FoldTablesEmitter(RecordKeeper &R) : Records(R), Target(R) {}

// run - Generate the 6 X86 memory fold tables.
void run(formatted_raw_ostream &OS);
void run(raw_ostream &OS);

private:
// Decides to which table to add the entry with the given instructions.
Expand Down Expand Up @@ -522,7 +522,8 @@ void X86FoldTablesEmitter::updateTables(const CodeGenInstruction *RegInstr,
}
}

void X86FoldTablesEmitter::run(formatted_raw_ostream &OS) {
void X86FoldTablesEmitter::run(raw_ostream &o) {
formatted_raw_ostream OS(o);
emitSourceFileHeader("X86 fold tables", OS);

// Holds all memory instructions
Expand Down Expand Up @@ -615,8 +616,7 @@ void X86FoldTablesEmitter::run(formatted_raw_ostream &OS) {

namespace llvm {

void EmitX86FoldTables(RecordKeeper &RK, raw_ostream &o) {
formatted_raw_ostream OS(o);
void EmitX86FoldTables(RecordKeeper &RK, raw_ostream &OS) {
X86FoldTablesEmitter(RK).run(OS);
}
} // namespace llvm

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