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[AMDGPU] Properly mark MUBUF and FLAT LDS DMA instructions. NFC.
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Add these bits to the MUBUF and FLAT LDS DMA instructions:

- LGKM_CNT - these operate on LDS;
- VALU - SPG 3.9.8: This instruction acts as both a MUBUF and
VALU instruction;

Codegen currently does not produce any of this, so the change is NFC.

Differential Revision: https://reviews.llvm.org/D124472
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rampitec committed Apr 26, 2022
1 parent fa8a9fe commit a9ccc7b
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Showing 2 changed files with 9 additions and 0 deletions.
6 changes: 6 additions & 0 deletions llvm/lib/Target/AMDGPU/BUFInstructions.td
Expand Up @@ -360,6 +360,8 @@ class MUBUF_Real <MUBUF_Pseudo ps> :
let mayStore = ps.mayStore;
let IsAtomicRet = ps.IsAtomicRet;
let IsAtomicNoRet = ps.IsAtomicNoRet;
let VALU = ps.VALU;
let LGKM_CNT = ps.LGKM_CNT;

bits<12> offset;
bits<5> cpol;
Expand Down Expand Up @@ -504,13 +506,15 @@ class MUBUF_Load_Pseudo <string opName,
let AsmMatchConverter = !if(isLds, "cvtMubufLds", "cvtMubuf");

let Constraints = !if(HasTiedDest, "$vdata = $vdata_in", "");
let LGKM_CNT = isLds;
let mayLoad = 1;
let mayStore = 0;
let maybeAtomic = 1;
let Uses = !if(isLds, [EXEC, M0], [EXEC]);
let has_tfe = !not(isLds);
let lds = isLds;
let elements = getMUBUFElements<vdata_vt>.ret;
let VALU = isLds;
}

class MUBUF_Offset_Load_Pat <Instruction inst, ValueType load_vt = i32, SDPatternOperator ld = null_frag> : Pat <
Expand Down Expand Up @@ -615,6 +619,7 @@ class MUBUF_Pseudo_Store_Lds<string opName>
(outs),
(ins SReg_128:$srsrc, SCSrc_b32:$soffset, offset:$offset, CPol:$cpol, SWZ:$swz),
" $srsrc, $soffset$offset lds$cpol$swz"> {
let LGKM_CNT = 1;
let mayLoad = 0;
let mayStore = 1;
let maybeAtomic = 1;
Expand All @@ -623,6 +628,7 @@ class MUBUF_Pseudo_Store_Lds<string opName>
let has_vaddr = 0;
let has_tfe = 0;
let lds = 1;
let VALU = 1;

let Uses = [EXEC, M0];
let AsmMatchConverter = "cvtMubufLds";
Expand Down
3 changes: 3 additions & 0 deletions llvm/lib/Target/AMDGPU/FLATInstructions.td
Expand Up @@ -99,6 +99,7 @@ class FLAT_Real <bits<7> op, FLAT_Pseudo ps> :
let IsAtomicNoRet = ps.IsAtomicNoRet;
let VM_CNT = ps.VM_CNT;
let LGKM_CNT = ps.LGKM_CNT;
let VALU = ps.VALU;

// encoding fields
bits<8> vaddr;
Expand Down Expand Up @@ -258,6 +259,7 @@ class FLAT_Global_Load_LDS_Pseudo <string opName, bit EnableSaddr = 0> : FLAT_Ps
let mayStore = 1;
let has_saddr = 1;
let enabled_saddr = EnableSaddr;
let VALU = 1;
let PseudoInstr = opName#!if(EnableSaddr, "_SADDR", "");
let Uses = [M0, EXEC];
let SchedRW = [WriteVMEM, WriteLDS];
Expand Down Expand Up @@ -418,6 +420,7 @@ class FLAT_Scratch_Load_LDS_Pseudo <string opName, bit EnableSaddr = 0,
let has_vaddr = EnableVaddr;
let has_sve = EnableSVE;
let sve = EnableVaddr;
let VALU = 1;
let PseudoInstr = opName#!if(EnableSVE, "_SVS", !if(EnableSaddr, "_SADDR", !if(EnableVaddr, "", "_ST")));
let Uses = [M0, EXEC];
let SchedRW = [WriteVMEM, WriteLDS];
Expand Down

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