Fix LLVM's handling and detection of skylake and cannonlake CPUs

Summary:
 - Rename `"skylake"` == SkylakeServerProc to `"skylake-avx512"`
 - Change `"skylake"` to denote SkylakeClientProc
 - Fix the detection of cpu family 6 and model 94 to be
   SkylakeClientProc instead of SkylakeServerProc
 - Remove the `"cnl"` for CannonLake

Reviewers: craig.topper, delena

Subscribers: zansari, echristo, qcolombet, RKSimon, spatel, DavidKreitzer, mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D17090

llvm-svn: 261482

llvm/lib/Support/Host.cpp

@@ -373,6 +373,7 @@ StringRef sys::getHostCPUName() {
 
       // Skylake:
       case 78:
+        return "skylake-avx512";
       case 94:
         return "skylake";
 

llvm/lib/Target/X86/X86.td

@@ -474,7 +474,7 @@ def SKLFeatures : ProcessorFeatures<BDWFeatures.Value, [
 // FIXME: define SKL model
 class SkylakeClientProc<string Name> : ProcModel<Name, HaswellModel,
                                                  SKLFeatures.Value, []>;
-def : SkylakeClientProc<"skl">;
+def : SkylakeClientProc<"skylake">;
 
 // FIXME: define KNL model
 class KnightsLandingProc<string Name> : ProcModel<Name, HaswellModel,
@@ -508,7 +508,7 @@ def SKXFeatures : ProcessorFeatures<SKLFeatures.Value, [
 // FIXME: define SKX model
 class SkylakeServerProc<string Name> : ProcModel<Name, HaswellModel,
                                                  SKXFeatures.Value, []>;
-def : SkylakeServerProc<"skylake">;
+def : SkylakeServerProc<"skylake-avx512">;
 def : SkylakeServerProc<"skx">; // Legacy alias.
 
 def CNLFeatures : ProcessorFeatures<SKXFeatures.Value, [
@@ -520,7 +520,6 @@ def CNLFeatures : ProcessorFeatures<SKXFeatures.Value, [
 class CannonlakeProc<string Name> : ProcModel<Name, HaswellModel,
                                               CNLFeatures.Value, []>;
 def : CannonlakeProc<"cannonlake">;
-def : CannonlakeProc<"cnl">;
 
 // AMD CPUs.
 

llvm/test/CodeGen/X86/slow-unaligned-mem.ll

@@ -14,15 +14,15 @@
 
 ; Intel chips with fast unaligned memory accesses
 
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=silvermont    2>&1 | FileCheck %s --check-prefix=FAST
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=nehalem       2>&1 | FileCheck %s --check-prefix=FAST
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=westmere      2>&1 | FileCheck %s --check-prefix=FAST
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=sandybridge   2>&1 | FileCheck %s --check-prefix=FAST
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=ivybridge     2>&1 | FileCheck %s --check-prefix=FAST
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=haswell       2>&1 | FileCheck %s --check-prefix=FAST
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=broadwell     2>&1 | FileCheck %s --check-prefix=FAST
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=knl           2>&1 | FileCheck %s --check-prefix=FAST
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=skylake       2>&1 | FileCheck %s --check-prefix=FAST
+; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=silvermont     2>&1 | FileCheck %s --check-prefix=FAST
+; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=nehalem        2>&1 | FileCheck %s --check-prefix=FAST
+; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=westmere       2>&1 | FileCheck %s --check-prefix=FAST
+; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=sandybridge    2>&1 | FileCheck %s --check-prefix=FAST
+; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=ivybridge      2>&1 | FileCheck %s --check-prefix=FAST
+; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=haswell        2>&1 | FileCheck %s --check-prefix=FAST
+; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=broadwell      2>&1 | FileCheck %s --check-prefix=FAST
+; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=knl            2>&1 | FileCheck %s --check-prefix=FAST
+; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=skylake-avx512 2>&1 | FileCheck %s --check-prefix=FAST
 
 ; AMD chips with slow unaligned memory accesses