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[AArch64] Add missing bf16 load insert pattern
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We have LDRHui load patterns but would fail to select from unscaled offsets.
This adds the missing pattern.
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davemgreen committed Mar 3, 2023
1 parent 6578e0d commit ae12e57
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Showing 2 changed files with 22 additions and 0 deletions.
4 changes: 4 additions & 0 deletions llvm/lib/Target/AArch64/AArch64InstrInfo.td
Original file line number Diff line number Diff line change
Expand Up @@ -3154,6 +3154,10 @@ defm LDURBB
[(set GPR32:$Rt,
(zextloadi8 (am_unscaled16 GPR64sp:$Rn, simm9:$offset)))]>;

// bf16 load pattern
def : Pat <(bf16 (load (am_unscaled16 GPR64sp:$Rn, simm9:$offset))),
(LDURHi GPR64sp:$Rn, simm9:$offset)>;

// Match all load 64 bits width whose type is compatible with FPR64
let Predicates = [IsLE] in {
def : Pat<(v2f32 (load (am_unscaled64 GPR64sp:$Rn, simm9:$offset))),
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18 changes: 18 additions & 0 deletions llvm/test/CodeGen/AArch64/bf16.ll
Original file line number Diff line number Diff line change
Expand Up @@ -11,6 +11,24 @@ define bfloat @test_load(ptr %p) nounwind {
ret bfloat %tmp1
}

define bfloat @test_load_offset1(ptr %p) nounwind {
; CHECK-LABEL: test_load_offset1:
; CHECK-NEXT: ldur h0, [x0, #1]
; CHECK-NEXT: ret
%g = getelementptr inbounds i8, ptr %p, i64 1
%tmp1 = load bfloat, ptr %g, align 2
ret bfloat %tmp1
}

define bfloat @test_load_offset2(ptr %p) nounwind {
; CHECK-LABEL: test_load_offset2:
; CHECK-NEXT: ldr h0, [x0, #2]
; CHECK-NEXT: ret
%g = getelementptr inbounds i8, ptr %p, i64 2
%tmp1 = load bfloat, ptr %g, align 2
ret bfloat %tmp1
}

define <4 x bfloat> @test_vec_load(ptr %p) nounwind {
; CHECK-LABEL: test_vec_load:
; CHECK-NEXT: ldr d0, [x0]
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