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[SDAG] enable binop identity constant folds for fmul/fdiv
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The test diffs are identical to D119111.

This only affects x86 currently because no other target
has an override for the TLI hook that controls this transform.

(cherry picked from commit 905abc5)
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@rotateright @tstellar
rotateright authored and tstellar committed Feb 16, 2022
1 parent 6311bae commit b0ae807
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Showing 2 changed files with 17 additions and 25 deletions.
3 changes: 3 additions & 0 deletions llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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Expand Up @@ -2134,6 +2134,9 @@ static SDValue foldSelectWithIdentityConstant(SDNode *N, SelectionDAG &DAG,
return C->isZero() && C->isNegative();
case ISD::FSUB: // X - 0.0 --> X
return C->isZero() && !C->isNegative();
case ISD::FMUL: // X * 1.0 --> X
case ISD::FDIV: // X / 1.0 --> X
return C->isExactlyValue(1.0);
}
}
return false;
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39 changes: 14 additions & 25 deletions llvm/test/CodeGen/X86/vector-bo-select.ll
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Expand Up @@ -279,9 +279,8 @@ define <4 x float> @fmul_v4f32(<4 x i1> %b, <4 x float> noundef %x, <4 x float>
; AVX512VL: # %bb.0:
; AVX512VL-NEXT: vpslld $31, %xmm0, %xmm0
; AVX512VL-NEXT: vptestmd %xmm0, %xmm0, %k1
; AVX512VL-NEXT: vbroadcastss {{.*#+}} xmm0 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]
; AVX512VL-NEXT: vmovaps %xmm2, %xmm0 {%k1}
; AVX512VL-NEXT: vmulps %xmm0, %xmm1, %xmm0
; AVX512VL-NEXT: vmulps %xmm2, %xmm1, %xmm1 {%k1}
; AVX512VL-NEXT: vmovaps %xmm1, %xmm0
; AVX512VL-NEXT: retq
%s = select <4 x i1> %b, <4 x float> %y, <4 x float> <float 1.0, float 1.0, float 1.0, float 1.0>
%r = fmul <4 x float> %x, %s
Expand Down Expand Up @@ -314,9 +313,8 @@ define <8 x float> @fmul_v8f32_commute(<8 x i1> %b, <8 x float> noundef %x, <8 x
; AVX512VL-NEXT: vpmovsxwd %xmm0, %ymm0
; AVX512VL-NEXT: vpslld $31, %ymm0, %ymm0
; AVX512VL-NEXT: vptestmd %ymm0, %ymm0, %k1
; AVX512VL-NEXT: vbroadcastss {{.*#+}} ymm0 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
; AVX512VL-NEXT: vmovaps %ymm2, %ymm0 {%k1}
; AVX512VL-NEXT: vmulps %ymm1, %ymm0, %ymm0
; AVX512VL-NEXT: vmulps %ymm2, %ymm1, %ymm1 {%k1}
; AVX512VL-NEXT: vmovaps %ymm1, %ymm0
; AVX512VL-NEXT: retq
%s = select <8 x i1> %b, <8 x float> %y, <8 x float> <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>
%r = fmul <8 x float> %s, %x
Expand Down Expand Up @@ -344,8 +342,8 @@ define <16 x float> @fmul_v16f32_swap(<16 x i1> %b, <16 x float> noundef %x, <16
; AVX512-NEXT: vpmovsxbd %xmm0, %zmm0
; AVX512-NEXT: vpslld $31, %zmm0, %zmm0
; AVX512-NEXT: vptestmd %zmm0, %zmm0, %k1
; AVX512-NEXT: vbroadcastss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm2 {%k1}
; AVX512-NEXT: vmulps %zmm2, %zmm1, %zmm0
; AVX512-NEXT: vmovaps %zmm1, %zmm0 {%k1}
; AVX512-NEXT: retq
%s = select <16 x i1> %b, <16 x float> <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>, <16 x float> %y
%r = fmul <16 x float> %x, %s
Expand Down Expand Up @@ -373,8 +371,8 @@ define <16 x float> @fmul_v16f32_commute_swap(<16 x i1> %b, <16 x float> noundef
; AVX512-NEXT: vpmovsxbd %xmm0, %zmm0
; AVX512-NEXT: vpslld $31, %zmm0, %zmm0
; AVX512-NEXT: vptestmd %zmm0, %zmm0, %k1
; AVX512-NEXT: vbroadcastss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm2 {%k1}
; AVX512-NEXT: vmulps %zmm1, %zmm2, %zmm0
; AVX512-NEXT: vmulps %zmm2, %zmm1, %zmm0
; AVX512-NEXT: vmovaps %zmm1, %zmm0 {%k1}
; AVX512-NEXT: retq
%s = select <16 x i1> %b, <16 x float> <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>, <16 x float> %y
%r = fmul <16 x float> %s, %x
Expand Down Expand Up @@ -405,9 +403,8 @@ define <4 x float> @fdiv_v4f32(<4 x i1> %b, <4 x float> noundef %x, <4 x float>
; AVX512VL: # %bb.0:
; AVX512VL-NEXT: vpslld $31, %xmm0, %xmm0
; AVX512VL-NEXT: vptestmd %xmm0, %xmm0, %k1
; AVX512VL-NEXT: vbroadcastss {{.*#+}} xmm0 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]
; AVX512VL-NEXT: vmovaps %xmm2, %xmm0 {%k1}
; AVX512VL-NEXT: vdivps %xmm0, %xmm1, %xmm0
; AVX512VL-NEXT: vdivps %xmm2, %xmm1, %xmm1 {%k1}
; AVX512VL-NEXT: vmovaps %xmm1, %xmm0
; AVX512VL-NEXT: retq
%s = select <4 x i1> %b, <4 x float> %y, <4 x float> <float 1.0, float 1.0, float 1.0, float 1.0>
%r = fdiv <4 x float> %x, %s
Expand Down Expand Up @@ -470,8 +467,8 @@ define <16 x float> @fdiv_v16f32_swap(<16 x i1> %b, <16 x float> noundef %x, <16
; AVX512-NEXT: vpmovsxbd %xmm0, %zmm0
; AVX512-NEXT: vpslld $31, %zmm0, %zmm0
; AVX512-NEXT: vptestmd %zmm0, %zmm0, %k1
; AVX512-NEXT: vbroadcastss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm2 {%k1}
; AVX512-NEXT: vdivps %zmm2, %zmm1, %zmm0
; AVX512-NEXT: vmovaps %zmm1, %zmm0 {%k1}
; AVX512-NEXT: retq
%s = select <16 x i1> %b, <16 x float> <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>, <16 x float> %y
%r = fdiv <16 x float> %x, %s
Expand Down Expand Up @@ -845,9 +842,7 @@ define <8 x float> @fmul_v8f32_cast_cond(i8 noundef zeroext %pb, <8 x float> nou
; AVX512VL-LABEL: fmul_v8f32_cast_cond:
; AVX512VL: # %bb.0:
; AVX512VL-NEXT: kmovw %edi, %k1
; AVX512VL-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
; AVX512VL-NEXT: vmovaps %ymm1, %ymm2 {%k1}
; AVX512VL-NEXT: vmulps %ymm2, %ymm0, %ymm0
; AVX512VL-NEXT: vmulps %ymm1, %ymm0, %ymm0 {%k1}
; AVX512VL-NEXT: retq
%b = bitcast i8 %pb to <8 x i1>
%s = select <8 x i1> %b, <8 x float> %y, <8 x float> <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>
Expand Down Expand Up @@ -911,9 +906,7 @@ define <8 x double> @fmul_v8f64_cast_cond(i8 noundef zeroext %pb, <8 x double> n
; AVX512-LABEL: fmul_v8f64_cast_cond:
; AVX512: # %bb.0:
; AVX512-NEXT: kmovw %edi, %k1
; AVX512-NEXT: vbroadcastsd {{.*#+}} zmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
; AVX512-NEXT: vmovapd %zmm1, %zmm2 {%k1}
; AVX512-NEXT: vmulpd %zmm2, %zmm0, %zmm0
; AVX512-NEXT: vmulpd %zmm1, %zmm0, %zmm0 {%k1}
; AVX512-NEXT: retq
%b = bitcast i8 %pb to <8 x i1>
%s = select <8 x i1> %b, <8 x double> %y, <8 x double> <double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0>
Expand Down Expand Up @@ -986,9 +979,7 @@ define <8 x float> @fdiv_v8f32_cast_cond(i8 noundef zeroext %pb, <8 x float> nou
; AVX512VL-LABEL: fdiv_v8f32_cast_cond:
; AVX512VL: # %bb.0:
; AVX512VL-NEXT: kmovw %edi, %k1
; AVX512VL-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
; AVX512VL-NEXT: vmovaps %ymm1, %ymm2 {%k1}
; AVX512VL-NEXT: vdivps %ymm2, %ymm0, %ymm0
; AVX512VL-NEXT: vdivps %ymm1, %ymm0, %ymm0 {%k1}
; AVX512VL-NEXT: retq
%b = bitcast i8 %pb to <8 x i1>
%s = select <8 x i1> %b, <8 x float> %y, <8 x float> <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>
Expand Down Expand Up @@ -1052,9 +1043,7 @@ define <8 x double> @fdiv_v8f64_cast_cond(i8 noundef zeroext %pb, <8 x double> n
; AVX512-LABEL: fdiv_v8f64_cast_cond:
; AVX512: # %bb.0:
; AVX512-NEXT: kmovw %edi, %k1
; AVX512-NEXT: vbroadcastsd {{.*#+}} zmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
; AVX512-NEXT: vmovapd %zmm1, %zmm2 {%k1}
; AVX512-NEXT: vdivpd %zmm2, %zmm0, %zmm0
; AVX512-NEXT: vdivpd %zmm1, %zmm0, %zmm0 {%k1}
; AVX512-NEXT: retq
%b = bitcast i8 %pb to <8 x i1>
%s = select <8 x i1> %b, <8 x double> %y, <8 x double> <double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0>
Expand Down

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