[ARM] iabs.ll - regenerate test checks

llvm/test/CodeGen/ARM/iabs.ll

@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
 ; RUN: llc -mtriple=arm-eabi -mattr=+v4t %s -o - | FileCheck %s
 
 ;; Integer absolute value, should produce something as good as: ARM:
@@ -6,13 +7,15 @@
 ;;   bx lr
 
 define i32 @test(i32 %a) {
-        %tmp1neg = sub i32 0, %a
-        %b = icmp sgt i32 %a, -1
-        %abs = select i1 %b, i32 %a, i32 %tmp1neg
-        ret i32 %abs
-; CHECK:  cmp
-; CHECK:  rsbmi r0, r0, #0
-; CHECK:  bx lr
+; CHECK-LABEL: test:
+; CHECK:       @ %bb.0:
+; CHECK-NEXT:    cmp r0, #0
+; CHECK-NEXT:    rsbmi r0, r0, #0
+; CHECK-NEXT:    bx lr
+  %tmp1neg = sub i32 0, %a
+  %b = icmp sgt i32 %a, -1
+  %abs = select i1 %b, i32 %a, i32 %tmp1neg
+  ret i32 %abs
 }
 
 ; rdar://11633193
@@ -21,11 +24,12 @@ define i32 @test(i32 %a) {
 ;;   rsbmi
 ;;   bx
 define i32 @test2(i32 %a, i32 %b) nounwind readnone ssp {
+; CHECK-LABEL: test2:
+; CHECK:       @ %bb.0: @ %entry
+; CHECK-NEXT:    subs r0, r0, r1
+; CHECK-NEXT:    rsbmi r0, r0, #0
+; CHECK-NEXT:    bx lr
 entry:
-; CHECK: test2
-; CHECK: subs
-; CHECK-NEXT: rsbmi
-; CHECK-NEXT: bx
   %sub = sub nsw i32 %a, %b
   %cmp = icmp sgt i32 %sub, -1
   %sub1 = sub nsw i32 0, %sub