Skip to content

Commit

Permalink
[AArch64][NFC]Autogenerated checks.
Browse files Browse the repository at this point in the history
  • Loading branch information
@ilinpv
ilinpv committed Apr 15, 2020
1 parent bab6df8 commit b2dff0d
Showing 1 changed file with 134 additions and 30 deletions.
164 changes: 134 additions & 30 deletions llvm/test/CodeGen/AArch64/fp16_intrinsic_lane.ll
View file
@@ -1,3 +1,4 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=aarch64-eabi -mattr=+v8.2a,+fullfp16 | FileCheck %s

declare half @llvm.aarch64.neon.fmulx.f16(half, half)
Expand All @@ -9,7 +10,11 @@ declare half @llvm.fma.f16(half, half, half) #1

define dso_local <4 x half> @t_vfma_lane_f16(<4 x half> %a, <4 x half> %b, <4 x half> %c, i32 %lane) {
; CHECK-LABEL: t_vfma_lane_f16:
; CHECK: dup v2.4h, v2.h[0]
; CHECK: .Lt_vfma_lane_f16$local:
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: // %bb.0: // %entry
; CHECK-NEXT: // kill: def $d2 killed $d2 def $q2
; CHECK-NEXT: dup v2.4h, v2.h[0]
; CHECK-NEXT: fmla v0.4h, v2.4h, v1.4h
; CHECK-NEXT: ret
entry:
Expand All @@ -20,7 +25,11 @@ entry:

define dso_local <8 x half> @t_vfmaq_lane_f16(<8 x half> %a, <8 x half> %b, <4 x half> %c, i32 %lane) {
; CHECK-LABEL: t_vfmaq_lane_f16:
; CHECK: dup v2.8h, v2.h[0]
; CHECK: .Lt_vfmaq_lane_f16$local:
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: // %bb.0: // %entry
; CHECK-NEXT: // kill: def $d2 killed $d2 def $q2
; CHECK-NEXT: dup v2.8h, v2.h[0]
; CHECK-NEXT: fmla v0.8h, v2.8h, v1.8h
; CHECK-NEXT: ret
entry:
Expand All @@ -31,7 +40,10 @@ entry:

define dso_local <4 x half> @t_vfma_laneq_f16(<4 x half> %a, <4 x half> %b, <8 x half> %c, i32 %lane) {
; CHECK-LABEL: t_vfma_laneq_f16:
; CHECK: dup v2.4h, v2.h[0]
; CHECK: .Lt_vfma_laneq_f16$local:
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: // %bb.0: // %entry
; CHECK-NEXT: dup v2.4h, v2.h[0]
; CHECK-NEXT: fmla v0.4h, v1.4h, v2.4h
; CHECK-NEXT: ret
entry:
Expand All @@ -42,7 +54,10 @@ entry:

define dso_local <8 x half> @t_vfmaq_laneq_f16(<8 x half> %a, <8 x half> %b, <8 x half> %c, i32 %lane) {
; CHECK-LABEL: t_vfmaq_laneq_f16:
; CHECK: dup v2.8h, v2.h[0]
; CHECK: .Lt_vfmaq_laneq_f16$local:
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: // %bb.0: // %entry
; CHECK-NEXT: dup v2.8h, v2.h[0]
; CHECK-NEXT: fmla v0.8h, v1.8h, v2.8h
; CHECK-NEXT: ret
entry:
Expand All @@ -53,7 +68,11 @@ entry:

define dso_local <4 x half> @t_vfma_n_f16(<4 x half> %a, <4 x half> %b, half %c) {
; CHECK-LABEL: t_vfma_n_f16:
; CHECK: dup v2.4h, v2.h[0]
; CHECK: .Lt_vfma_n_f16$local:
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: // %bb.0: // %entry
; CHECK-NEXT: // kill: def $h2 killed $h2 def $q2
; CHECK-NEXT: dup v2.4h, v2.h[0]
; CHECK-NEXT: fmla v0.4h, v2.4h, v1.4h
; CHECK-NEXT: ret
entry:
Expand All @@ -65,7 +84,11 @@ entry:

define dso_local <8 x half> @t_vfmaq_n_f16(<8 x half> %a, <8 x half> %b, half %c) {
; CHECK-LABEL: t_vfmaq_n_f16:
; CHECK: dup v2.8h, v2.h[0]
; CHECK: .Lt_vfmaq_n_f16$local:
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: // %bb.0: // %entry
; CHECK-NEXT: // kill: def $h2 killed $h2 def $q2
; CHECK-NEXT: dup v2.8h, v2.h[0]
; CHECK-NEXT: fmla v0.8h, v2.8h, v1.8h
; CHECK-NEXT: ret
entry:
Expand All @@ -77,7 +100,11 @@ entry:

define dso_local half @t_vfmah_lane_f16(half %a, half %b, <4 x half> %c, i32 %lane) {
; CHECK-LABEL: t_vfmah_lane_f16:
; CHECK: fmadd h0, h1, h2, h0
; CHECK: .Lt_vfmah_lane_f16$local:
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: // %bb.0: // %entry
; CHECK-NEXT: // kill: def $d2 killed $d2 def $q2
; CHECK-NEXT: fmadd h0, h1, h2, h0
; CHECK-NEXT: ret
entry:
%extract = extractelement <4 x half> %c, i32 0
Expand All @@ -87,7 +114,10 @@ entry:

define dso_local half @t_vfmah_laneq_f16(half %a, half %b, <8 x half> %c, i32 %lane) {
; CHECK-LABEL: t_vfmah_laneq_f16:
; CHECK: fmadd h0, h1, h2, h0
; CHECK: .Lt_vfmah_laneq_f16$local:
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: // %bb.0: // %entry
; CHECK-NEXT: fmadd h0, h1, h2, h0
; CHECK-NEXT: ret
entry:
%extract = extractelement <8 x half> %c, i32 0
Expand All @@ -97,7 +127,11 @@ entry:

define dso_local <4 x half> @t_vfms_lane_f16(<4 x half> %a, <4 x half> %b, <4 x half> %c, i32 %lane) {
; CHECK-LABEL: t_vfms_lane_f16:
; CHECK: fneg v1.4h, v1.4h
; CHECK: .Lt_vfms_lane_f16$local:
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: // %bb.0: // %entry
; CHECK-NEXT: // kill: def $d2 killed $d2 def $q2
; CHECK-NEXT: fneg v1.4h, v1.4h
; CHECK-NEXT: dup v2.4h, v2.h[0]
; CHECK-NEXT: fmla v0.4h, v2.4h, v1.4h
; CHECK-NEXT: ret
Expand All @@ -110,7 +144,11 @@ entry:

define dso_local <8 x half> @t_vfmsq_lane_f16(<8 x half> %a, <8 x half> %b, <4 x half> %c, i32 %lane) {
; CHECK-LABEL: t_vfmsq_lane_f16:
; CHECK: fneg v1.8h, v1.8h
; CHECK: .Lt_vfmsq_lane_f16$local:
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: // %bb.0: // %entry
; CHECK-NEXT: // kill: def $d2 killed $d2 def $q2
; CHECK-NEXT: fneg v1.8h, v1.8h
; CHECK-NEXT: dup v2.8h, v2.h[0]
; CHECK-NEXT: fmla v0.8h, v2.8h, v1.8h
; CHECK-NEXT: ret
Expand All @@ -123,7 +161,10 @@ entry:

define dso_local <4 x half> @t_vfms_laneq_f16(<4 x half> %a, <4 x half> %b, <8 x half> %c, i32 %lane) {
; CHECK-LABEL: t_vfms_laneq_f16:
; CHECK: dup v2.4h, v2.h[0]
; CHECK: .Lt_vfms_laneq_f16$local:
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: // %bb.0: // %entry
; CHECK-NEXT: dup v2.4h, v2.h[0]
; CHECK-NEXT: fmls v0.4h, v2.4h, v1.4h
; CHECK-NEXT: ret
entry:
Expand All @@ -135,7 +176,10 @@ entry:

define dso_local <8 x half> @t_vfmsq_laneq_f16(<8 x half> %a, <8 x half> %b, <8 x half> %c, i32 %lane) {
; CHECK-LABEL: t_vfmsq_laneq_f16:
; CHECK: dup v2.8h, v2.h[0]
; CHECK: .Lt_vfmsq_laneq_f16$local:
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: // %bb.0: // %entry
; CHECK-NEXT: dup v2.8h, v2.h[0]
; CHECK-NEXT: fmls v0.8h, v2.8h, v1.8h
; CHECK-NEXT: ret
entry:
Expand All @@ -147,7 +191,11 @@ entry:

define dso_local <4 x half> @t_vfms_n_f16(<4 x half> %a, <4 x half> %b, half %c) {
; CHECK-LABEL: t_vfms_n_f16:
; CHECK: fneg v1.4h, v1.4h
; CHECK: .Lt_vfms_n_f16$local:
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: // %bb.0: // %entry
; CHECK-NEXT: // kill: def $h2 killed $h2 def $q2
; CHECK-NEXT: fneg v1.4h, v1.4h
; CHECK-NEXT: dup v2.4h, v2.h[0]
; CHECK-NEXT: fmla v0.4h, v2.4h, v1.4h
; CHECK-NEXT: ret
Expand All @@ -161,7 +209,11 @@ entry:

define dso_local <8 x half> @t_vfmsq_n_f16(<8 x half> %a, <8 x half> %b, half %c) {
; CHECK-LABEL: t_vfmsq_n_f16:
; CHECK: fneg v1.8h, v1.8h
; CHECK: .Lt_vfmsq_n_f16$local:
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: // %bb.0: // %entry
; CHECK-NEXT: // kill: def $h2 killed $h2 def $q2
; CHECK-NEXT: fneg v1.8h, v1.8h
; CHECK-NEXT: dup v2.8h, v2.h[0]
; CHECK-NEXT: fmla v0.8h, v2.8h, v1.8h
; CHECK-NEXT: ret
Expand All @@ -175,7 +227,11 @@ entry:

define dso_local half @t_vfmsh_lane_f16(half %a, half %b, <4 x half> %c, i32 %lane) {
; CHECK-LABEL: t_vfmsh_lane_f16:
; CHECK: fmsub h0, h1, h2, h0
; CHECK: .Lt_vfmsh_lane_f16$local:
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: // %bb.0: // %entry
; CHECK-NEXT: // kill: def $d2 killed $d2 def $q2
; CHECK-NEXT: fmsub h0, h1, h2, h0
; CHECK-NEXT: ret
entry:
%0 = fsub half 0xH8000, %b
Expand All @@ -186,8 +242,11 @@ entry:

define dso_local half @t_vfmsh_laneq_f16(half %a, half %b, <8 x half> %c, i32 %lane) {
; CHECK-LABEL: t_vfmsh_laneq_f16:
; CHECK: fmsub h0, h1, h2, h0
; CHECK-NEXT: ret
; CHECK: .Lt_vfmsh_laneq_f16$local:
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: // %bb.0: // %entry
; CHECK-NEXT: fmsub h0, h1, h2, h0
; CHECK-NEXT: ret
entry:
%0 = fsub half 0xH8000, %b
%extract = extractelement <8 x half> %c, i32 0
Expand All @@ -197,7 +256,10 @@ entry:

define dso_local <4 x half> @t_vmul_laneq_f16(<4 x half> %a, <8 x half> %b, i32 %lane) {
; CHECK-LABEL: t_vmul_laneq_f16:
; CHECK: fmul v0.4h, v0.4h, v1.h[0]
; CHECK: .Lt_vmul_laneq_f16$local:
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: // %bb.0: // %entry
; CHECK-NEXT: fmul v0.4h, v0.4h, v1.h[0]
; CHECK-NEXT: ret
entry:
%shuffle = shufflevector <8 x half> %b, <8 x half> undef, <4 x i32> zeroinitializer
Expand All @@ -207,7 +269,10 @@ entry:

define dso_local <8 x half> @t_vmulq_laneq_f16(<8 x half> %a, <8 x half> %b, i32 %lane) {
; CHECK-LABEL: t_vmulq_laneq_f16:
; CHECK: fmul v0.8h, v0.8h, v1.h[0]
; CHECK: .Lt_vmulq_laneq_f16$local:
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: // %bb.0: // %entry
; CHECK-NEXT: fmul v0.8h, v0.8h, v1.h[0]
; CHECK-NEXT: ret
entry:
%shuffle = shufflevector <8 x half> %b, <8 x half> undef, <8 x i32> zeroinitializer
Expand All @@ -217,7 +282,11 @@ entry:

define dso_local half @t_vmulh_lane_f16(half %a, <4 x half> %c, i32 %lane) {
; CHECK-LABEL: t_vmulh_lane_f16:
; CHECK: fmul h0, h0, v1.h[0]
; CHECK: .Lt_vmulh_lane_f16$local:
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: // %bb.0: // %entry
; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1
; CHECK-NEXT: fmul h0, h0, v1.h[0]
; CHECK-NEXT: ret
entry:
%0 = extractelement <4 x half> %c, i32 0
Expand All @@ -227,7 +296,10 @@ entry:

define dso_local half @t_vmulh_laneq_f16(half %a, <8 x half> %c, i32 %lane) {
; CHECK-LABEL: t_vmulh_laneq_f16:
; CHECK: fmul h0, h0, v1.h[0]
; CHECK: .Lt_vmulh_laneq_f16$local:
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: // %bb.0: // %entry
; CHECK-NEXT: fmul h0, h0, v1.h[0]
; CHECK-NEXT: ret
entry:
%0 = extractelement <8 x half> %c, i32 0
Expand All @@ -237,7 +309,10 @@ entry:

define dso_local half @t_vmulx_f16(half %a, half %b) {
; CHECK-LABEL: t_vmulx_f16:
; CHECK: fmulx h0, h0, h1
; CHECK: .Lt_vmulx_f16$local:
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: // %bb.0: // %entry
; CHECK-NEXT: fmulx h0, h0, h1
; CHECK-NEXT: ret
entry:
%fmulx.i = tail call half @llvm.aarch64.neon.fmulx.f16(half %a, half %b)
Expand All @@ -246,7 +321,11 @@ entry:

define dso_local half @t_vmulxh_lane_f16(half %a, <4 x half> %b, i32 %lane) {
; CHECK-LABEL: t_vmulxh_lane_f16:
; CHECK: fmulx h0, h0, v1.h[3]
; CHECK: .Lt_vmulxh_lane_f16$local:
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: // %bb.0: // %entry
; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1
; CHECK-NEXT: fmulx h0, h0, v1.h[3]
; CHECK-NEXT: ret
entry:
%extract = extractelement <4 x half> %b, i32 3
Expand All @@ -256,7 +335,11 @@ entry:

define dso_local <4 x half> @t_vmulx_lane_f16(<4 x half> %a, <4 x half> %b, i32 %lane) {
; CHECK-LABEL: t_vmulx_lane_f16:
; CHECK: fmulx v0.4h, v0.4h, v1.h[0]
; CHECK: .Lt_vmulx_lane_f16$local:
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: // %bb.0: // %entry
; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1
; CHECK-NEXT: fmulx v0.4h, v0.4h, v1.h[0]
; CHECK-NEXT: ret
entry:
%shuffle = shufflevector <4 x half> %b, <4 x half> undef, <4 x i32> zeroinitializer
Expand All @@ -266,7 +349,11 @@ entry:

define dso_local <8 x half> @t_vmulxq_lane_f16(<8 x half> %a, <4 x half> %b, i32 %lane) {
; CHECK-LABEL: t_vmulxq_lane_f16:
; CHECK: fmulx v0.8h, v0.8h, v1.h[0]
; CHECK: .Lt_vmulxq_lane_f16$local:
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: // %bb.0: // %entry
; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1
; CHECK-NEXT: fmulx v0.8h, v0.8h, v1.h[0]
; CHECK-NEXT: ret
entry:
%shuffle = shufflevector <4 x half> %b, <4 x half> undef, <8 x i32> zeroinitializer
Expand All @@ -276,7 +363,10 @@ entry:

define dso_local <4 x half> @t_vmulx_laneq_f16(<4 x half> %a, <8 x half> %b, i32 %lane) {
; CHECK-LABEL: t_vmulx_laneq_f16:
; CHECK: fmulx v0.4h, v0.4h, v1.h[0]
; CHECK: .Lt_vmulx_laneq_f16$local:
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: // %bb.0: // %entry
; CHECK-NEXT: fmulx v0.4h, v0.4h, v1.h[0]
; CHECK-NEXT: ret
entry:
%shuffle = shufflevector <8 x half> %b, <8 x half> undef, <4 x i32> zeroinitializer
Expand All @@ -286,7 +376,10 @@ entry:

define dso_local <8 x half> @t_vmulxq_laneq_f16(<8 x half> %a, <8 x half> %b, i32 %lane) {
; CHECK-LABEL: t_vmulxq_laneq_f16:
; CHECK: fmulx v0.8h, v0.8h, v1.h[0]
; CHECK: .Lt_vmulxq_laneq_f16$local:
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: // %bb.0: // %entry
; CHECK-NEXT: fmulx v0.8h, v0.8h, v1.h[0]
; CHECK-NEXT: ret
entry:
%shuffle = shufflevector <8 x half> %b, <8 x half> undef, <8 x i32> zeroinitializer
Expand All @@ -296,7 +389,10 @@ entry:

define dso_local half @t_vmulxh_laneq_f16(half %a, <8 x half> %b, i32 %lane) {
; CHECK-LABEL: t_vmulxh_laneq_f16:
; CHECK: fmulx h0, h0, v1.h[7]
; CHECK: .Lt_vmulxh_laneq_f16$local:
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: // %bb.0: // %entry
; CHECK-NEXT: fmulx h0, h0, v1.h[7]
; CHECK-NEXT: ret
entry:
%extract = extractelement <8 x half> %b, i32 7
Expand All @@ -306,7 +402,11 @@ entry:

define dso_local <4 x half> @t_vmulx_n_f16(<4 x half> %a, half %c) {
; CHECK-LABEL: t_vmulx_n_f16:
; CHECK: dup v1.4h, v1.h[0]
; CHECK: .Lt_vmulx_n_f16$local:
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: // %bb.0: // %entry
; CHECK-NEXT: // kill: def $h1 killed $h1 def $q1
; CHECK-NEXT: dup v1.4h, v1.h[0]
; CHECK-NEXT: fmulx v0.4h, v0.4h, v1.4h
; CHECK-NEXT: ret
entry:
Expand All @@ -318,7 +418,11 @@ entry:

define dso_local <8 x half> @t_vmulxq_n_f16(<8 x half> %a, half %c) {
; CHECK-LABEL: t_vmulxq_n_f16:
; CHECK: dup v1.8h, v1.h[0]
; CHECK: .Lt_vmulxq_n_f16$local:
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: // %bb.0: // %entry
; CHECK-NEXT: // kill: def $h1 killed $h1 def $q1
; CHECK-NEXT: dup v1.8h, v1.h[0]
; CHECK-NEXT: fmulx v0.8h, v0.8h, v1.8h
; CHECK-NEXT: ret
entry:
Expand Down

0 comments on commit b2dff0d

Please sign in to comment.