[X86] lowerShuffleAsVTRUNC - improve detection of cheap/free vector c…

…oncatenation Handle the case where the lo/hi subvectors are a split load.
llvm · Dec 14, 2022 · b3eaf40 · b3eaf40
1 parent 15406d2
commit b3eaf40
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Showing 9 changed files with 717 additions and 1,305 deletions.
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -12556,11 +12556,23 @@ static SDValue lowerShuffleAsVTRUNC(const SDLoc &DL, MVT VT, SDValue V1,
           UpperElts > 0 && isUndefInRange(Mask, NumSrcElts, UpperElts);
 
       // For offset truncations, ensure that the concat is cheap.
-      // TODO: Relax this?
-      if (Offset && (V1.getOpcode() != ISD::EXTRACT_SUBVECTOR ||
-                     V2.getOpcode() != ISD::EXTRACT_SUBVECTOR ||
-                     V1.getOperand(0) != V2.getOperand(0)))
-        continue;
+      if (Offset) {
+        auto IsCheapConcat = [&](SDValue Lo, SDValue Hi) {
+          if (Lo.getOpcode() == ISD::EXTRACT_SUBVECTOR &&
+              Hi.getOpcode() == ISD::EXTRACT_SUBVECTOR)
+            return Lo.getOperand(0) == Hi.getOperand(0);
+          if (ISD::isNormalLoad(Lo.getNode()) &&
+              ISD::isNormalLoad(Hi.getNode())) {
+            auto *LDLo = cast<LoadSDNode>(Lo);
+            auto *LDHi = cast<LoadSDNode>(Hi);
+            return DAG.areNonVolatileConsecutiveLoads(
+                LDHi, LDLo, Lo.getValueType().getStoreSize(), 1);
+          }
+          return false;
+        };
+        if (!IsCheapConcat(V1, V2))
+          continue;
+      }
 
       // As we're using both sources then we need to concat them together
       // and truncate from the double-sized src.