[X86][test] Merge the decoding tests for avx512_bf16 and unify the names

llvm · Dec 13, 2023 · b493793 · b493793
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diff --git a/llvm/test/MC/Disassembler/X86/avx512_bf16.txt b/llvm/test/MC/Disassembler/X86/avx512_bf16.txt
@@ -0,0 +1,90 @@
+# RUN: llvm-mc -triple x86_64 -disassemble %s | FileCheck %s --check-prefix=ATT
+# RUN: llvm-mc -triple x86_64 -disassemble -output-asm-variant=1 %s | FileCheck %s --check-prefix=INTEL
+
+# ATT:   vcvtne2ps2bf16	%zmm4, %zmm5, %zmm6
+# INTEL: vcvtne2ps2bf16	zmm6, zmm5, zmm4
+0x62,0xf2,0x57,0x48,0x72,0xf4
+
+# ATT:   vcvtne2ps2bf16	%zmm4, %zmm5, %zmm6 {%k7}
+# INTEL: vcvtne2ps2bf16	zmm6 {k7}, zmm5, zmm4
+0x62,0xf2,0x57,0x4f,0x72,0xf4
+
+# ATT:   vcvtne2ps2bf16	%zmm4, %zmm5, %zmm6 {%k7} {z}
+# INTEL: vcvtne2ps2bf16	zmm6 {k7} {z}, zmm5, zmm4
+0x62,0xf2,0x57,0xcf,0x72,0xf4
+
+# ATT:   vcvtne2ps2bf16	(%ecx), %zmm5, %zmm6
+# INTEL: vcvtne2ps2bf16	zmm6, zmm5, zmmword ptr [ecx]
+0x67,0x62,0xf2,0x57,0x48,0x72,0x31
+
+# ATT:   vcvtne2ps2bf16	291(%esp,%esi,8), %zmm5, %zmm6
+# INTEL: vcvtne2ps2bf16	zmm6, zmm5, zmmword ptr [esp + 8*esi + 291]
+0x67,0x62,0xf2,0x57,0x48,0x72,0xb4,0xf4,0x23,0x01,0x00,0x00
+
+# ATT:   vcvtne2ps2bf16	268435456(%esp,%esi,8), %zmm5, %zmm6
+# INTEL: vcvtne2ps2bf16	zmm6, zmm5, zmmword ptr [esp + 8*esi + 268435456]
+0x67,0x62,0xf2,0x57,0x48,0x72,0xb4,0xf4,0x00,0x00,0x00,0x10
+
+# ATT:   vcvtne2ps2bf16	-64(%esp), %zmm5, %zmm6
+# INTEL: vcvtne2ps2bf16	zmm6, zmm5, zmmword ptr [esp - 64]
+0x67,0x62,0xf2,0x57,0x48,0x72,0x74,0x24,0xff
+
+# ATT:   vcvtne2ps2bf16	(%eax){1to16}, %zmm5, %zmm6
+# INTEL: vcvtne2ps2bf16	zmm6, zmm5, dword ptr [eax]{1to16}
+0x67,0x62,0xf2,0x57,0x58,0x72,0x30
+
+# ATT:   vcvtne2ps2bf16	8128(%edx), %zmm5, %zmm6
+# INTEL: vcvtne2ps2bf16	zmm6, zmm5, zmmword ptr [edx + 8128]
+0x67,0x62,0xf2,0x57,0x48,0x72,0x72,0x7f
+
+# ATT:   vcvtne2ps2bf16	-8192(%edx), %zmm5, %zmm6
+# INTEL: vcvtne2ps2bf16	zmm6, zmm5, zmmword ptr [edx - 8192]
+0x67,0x62,0xf2,0x57,0x48,0x72,0x72,0x80
+
+# ATT:   vcvtne2ps2bf16	508(%edx){1to16}, %zmm5, %zmm6
+# INTEL: vcvtne2ps2bf16	zmm6, zmm5, dword ptr [edx + 508]{1to16}
+0x67,0x62,0xf2,0x57,0x58,0x72,0x72,0x7f
+
+# ATT:   vcvtne2ps2bf16	-512(%edx){1to16}, %zmm5, %zmm6
+# INTEL: vcvtne2ps2bf16	zmm6, zmm5, dword ptr [edx - 512]{1to16}
+0x67,0x62,0xf2,0x57,0x58,0x72,0x72,0x80
+
+# ATT:   vcvtneps2bf16	%zmm5, %ymm6
+# INTEL: vcvtneps2bf16	ymm6, zmm5
+0x62,0xf2,0x7e,0x48,0x72,0xf5
+
+# ATT:   vcvtneps2bf16	268435456(%esp,%esi,8), %ymm6 {%k7}
+# INTEL: vcvtneps2bf16	ymm6 {k7}, zmmword ptr [esp + 8*esi + 268435456]
+0x67,0x62,0xf2,0x7e,0x4f,0x72,0xb4,0xf4,0x00,0x00,0x00,0x10
+
+# ATT:   vcvtneps2bf16	(%ecx){1to16}, %ymm6
+# INTEL: vcvtneps2bf16	ymm6, dword ptr [ecx]{1to16}
+0x67,0x62,0xf2,0x7e,0x58,0x72,0x31
+
+# ATT:   vcvtneps2bf16	8128(%ecx), %ymm6
+# INTEL: vcvtneps2bf16	ymm6, zmmword ptr [ecx + 8128]
+0x67,0x62,0xf2,0x7e,0x48,0x72,0x71,0x7f
+
+# ATT:   vcvtneps2bf16	-512(%edx){1to16}, %ymm6 {%k7} {z}
+# INTEL: vcvtneps2bf16	ymm6 {k7} {z}, dword ptr [edx - 512]{1to16}
+0x67,0x62,0xf2,0x7e,0xdf,0x72,0x72,0x80
+
+# ATT:   vdpbf16ps	%zmm4, %zmm5, %zmm6
+# INTEL: vdpbf16ps	zmm6, zmm5, zmm4
+0x62,0xf2,0x56,0x48,0x52,0xf4
+
+# ATT:   vdpbf16ps	268435456(%esp,%esi,8), %zmm5, %zmm6 {%k7}
+# INTEL: vdpbf16ps	zmm6 {k7}, zmm5, zmmword ptr [esp + 8*esi + 268435456]
+0x67,0x62,0xf2,0x56,0x4f,0x52,0xb4,0xf4,0x00,0x00,0x00,0x10
+
+# ATT:   vdpbf16ps	(%ecx){1to16}, %zmm5, %zmm6
+# INTEL: vdpbf16ps	zmm6, zmm5, dword ptr [ecx]{1to16}
+0x67,0x62,0xf2,0x56,0x58,0x52,0x31
+
+# ATT:   vdpbf16ps	8128(%ecx), %zmm5, %zmm6
+# INTEL: vdpbf16ps	zmm6, zmm5, zmmword ptr [ecx + 8128]
+0x67,0x62,0xf2,0x56,0x48,0x52,0x71,0x7f
+
+# ATT:   vdpbf16ps	-512(%edx){1to16}, %zmm5, %zmm6 {%k7} {z}
+# INTEL: vdpbf16ps	zmm6 {k7} {z}, zmm5, dword ptr [edx - 512]{1to16}
+0x67,0x62,0xf2,0x56,0xdf,0x52,0x72,0x80
diff --git a/llvm/test/MC/Disassembler/X86/avx512bf16-att.txt b/llvm/test/MC/Disassembler/X86/avx512bf16-att.txt
diff --git a/llvm/test/MC/Disassembler/X86/avx512bf16-intel.txt b/llvm/test/MC/Disassembler/X86/avx512bf16-intel.txt
diff --git a/llvm/test/MC/X86/avx512_bf16-encoding.s → llvm/test/MC/X86/avx512_bf16-att.s b/llvm/test/MC/X86/avx512_bf16-encoding.s → llvm/test/MC/X86/avx512_bf16-att.s
diff --git a/llvm/test/MC/X86/intel-syntax-avx512_bf16.s → llvm/test/MC/X86/avx512_bf16-intel.s b/llvm/test/MC/X86/intel-syntax-avx512_bf16.s → llvm/test/MC/X86/avx512_bf16-intel.s