[AMDGPU] Added 'a' constraint documentation. NFC.

AGPR inline asm constraint was missing from the LangRef.rst.
llvm · May 5, 2020 · b856ff9 · b856ff9
1 parent b40d073
commit b856ff9
Showing 1 changed file with 1 addition and 0 deletions.
diff --git a/llvm/docs/LangRef.rst b/llvm/docs/LangRef.rst
@@ -4104,6 +4104,7 @@ AMDGPU:
 - ``r``: A 32 or 64-bit integer register.
 - ``[0-9]v``: The 32-bit VGPR register, number 0-9.
 - ``[0-9]s``: The 32-bit SGPR register, number 0-9.
+- ``[0-9]a``: The 32-bit AGPR register, number 0-9.
 
 
 All ARM modes: