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Optimize mul in the zba extension with SH*ADD
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This patch does the following optimization of mul with a constant.

(mul x, 11) -> (SH1ADD (SH2ADD x, x), x)
(mul x, 19) -> (SH1ADD (SH3ADD x, x), x)
(mul x, 13) -> (SH2ADD (SH1ADD x, x), x)
(mul x, 21) -> (SH2ADD (SH2ADD x, x), x)
(mul x, 37) -> (SH2ADD (SH3ADD x, x), x)
(mul x, 25) -> (SH3ADD (SH1ADD x, x), x)
(mul x, 41) -> (SH3ADD (SH2ADD x, x), x)
(mul x, 73) -> (SH3ADD (SH3ADD x, x), x)
(mul x, 27) -> (SH1ADD (SH3ADD x, x), (SH3ADD x, x))
(mul x, 45) -> (SH2ADD (SH3ADD x, x), (SH3ADD x, x))
(mul x, 81) -> (SH3ADD (SH3ADD x, x), (SH3ADD x, x))

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D107065
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@benshi001
benshi001 committed Jul 30, 2021
1 parent 811be79 commit bb6fddb
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Showing 5 changed files with 121 additions and 90 deletions.
8 changes: 8 additions & 0 deletions llvm/lib/Target/RISCV/RISCVInstrInfo.td
View file
Expand Up @@ -893,6 +893,14 @@ def mul_oneuse : PatFrag<(ops node:$A, node:$B), (mul node:$A, node:$B), [{
return N->hasOneUse();
}]>;

def mul_const_oneuse : PatFrag<(ops node:$A, node:$B),
(mul node:$A, node:$B), [{
if (auto *N1C = dyn_cast<ConstantSDNode>(N->getOperand(1)))
if (N1C->hasOneUse())
return true;
return false;
}]>;

/// Simple arithmetic operations

def : PatGprGpr<add, ADD>;
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23 changes: 23 additions & 0 deletions llvm/lib/Target/RISCV/RISCVInstrInfoB.td
View file
Expand Up @@ -1020,6 +1020,29 @@ def : Pat<(mul GPR:$r, C5LeftShift:$i),
def : Pat<(mul GPR:$r, C9LeftShift:$i),
(SLLI (SH3ADD GPR:$r, GPR:$r),
(TrailingZerosXForm C9LeftShift:$i))>;

def : Pat<(mul_const_oneuse GPR:$r, (XLenVT 11)),
(SH1ADD (SH2ADD GPR:$r, GPR:$r), GPR:$r)>;
def : Pat<(mul_const_oneuse GPR:$r, (XLenVT 19)),
(SH1ADD (SH3ADD GPR:$r, GPR:$r), GPR:$r)>;
def : Pat<(mul_const_oneuse GPR:$r, (XLenVT 13)),
(SH2ADD (SH1ADD GPR:$r, GPR:$r), GPR:$r)>;
def : Pat<(mul_const_oneuse GPR:$r, (XLenVT 21)),
(SH2ADD (SH2ADD GPR:$r, GPR:$r), GPR:$r)>;
def : Pat<(mul_const_oneuse GPR:$r, (XLenVT 37)),
(SH2ADD (SH3ADD GPR:$r, GPR:$r), GPR:$r)>;
def : Pat<(mul_const_oneuse GPR:$r, (XLenVT 25)),
(SH3ADD (SH1ADD GPR:$r, GPR:$r), GPR:$r)>;
def : Pat<(mul_const_oneuse GPR:$r, (XLenVT 41)),
(SH3ADD (SH2ADD GPR:$r, GPR:$r), GPR:$r)>;
def : Pat<(mul_const_oneuse GPR:$r, (XLenVT 73)),
(SH3ADD (SH3ADD GPR:$r, GPR:$r), GPR:$r)>;
def : Pat<(mul_const_oneuse GPR:$r, (XLenVT 27)),
(SH1ADD (SH3ADD GPR:$r, GPR:$r), (SH3ADD GPR:$r, GPR:$r))>;
def : Pat<(mul_const_oneuse GPR:$r, (XLenVT 45)),
(SH2ADD (SH3ADD GPR:$r, GPR:$r), (SH3ADD GPR:$r, GPR:$r))>;
def : Pat<(mul_const_oneuse GPR:$r, (XLenVT 81)),
(SH3ADD (SH3ADD GPR:$r, GPR:$r), (SH3ADD GPR:$r, GPR:$r))>;
} // Predicates = [HasStdExtZba]

let Predicates = [HasStdExtZba, IsRV64] in {
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88 changes: 44 additions & 44 deletions llvm/test/CodeGen/RISCV/rv32zba.ll
View file
Expand Up @@ -438,14 +438,14 @@ define i32 @mul11(i32 %a) {
;
; RV32IB-LABEL: mul11:
; RV32IB: # %bb.0:
; RV32IB-NEXT: addi a1, zero, 11
; RV32IB-NEXT: mul a0, a0, a1
; RV32IB-NEXT: sh2add a1, a0, a0
; RV32IB-NEXT: sh1add a0, a1, a0
; RV32IB-NEXT: ret
;
; RV32IBA-LABEL: mul11:
; RV32IBA: # %bb.0:
; RV32IBA-NEXT: addi a1, zero, 11
; RV32IBA-NEXT: mul a0, a0, a1
; RV32IBA-NEXT: sh2add a1, a0, a0
; RV32IBA-NEXT: sh1add a0, a1, a0
; RV32IBA-NEXT: ret
%c = mul i32 %a, 11
ret i32 %c
Expand All @@ -460,14 +460,14 @@ define i32 @mul19(i32 %a) {
;
; RV32IB-LABEL: mul19:
; RV32IB: # %bb.0:
; RV32IB-NEXT: addi a1, zero, 19
; RV32IB-NEXT: mul a0, a0, a1
; RV32IB-NEXT: sh3add a1, a0, a0
; RV32IB-NEXT: sh1add a0, a1, a0
; RV32IB-NEXT: ret
;
; RV32IBA-LABEL: mul19:
; RV32IBA: # %bb.0:
; RV32IBA-NEXT: addi a1, zero, 19
; RV32IBA-NEXT: mul a0, a0, a1
; RV32IBA-NEXT: sh3add a1, a0, a0
; RV32IBA-NEXT: sh1add a0, a1, a0
; RV32IBA-NEXT: ret
%c = mul i32 %a, 19
ret i32 %c
Expand All @@ -482,14 +482,14 @@ define i32 @mul13(i32 %a) {
;
; RV32IB-LABEL: mul13:
; RV32IB: # %bb.0:
; RV32IB-NEXT: addi a1, zero, 13
; RV32IB-NEXT: mul a0, a0, a1
; RV32IB-NEXT: sh1add a1, a0, a0
; RV32IB-NEXT: sh2add a0, a1, a0
; RV32IB-NEXT: ret
;
; RV32IBA-LABEL: mul13:
; RV32IBA: # %bb.0:
; RV32IBA-NEXT: addi a1, zero, 13
; RV32IBA-NEXT: mul a0, a0, a1
; RV32IBA-NEXT: sh1add a1, a0, a0
; RV32IBA-NEXT: sh2add a0, a1, a0
; RV32IBA-NEXT: ret
%c = mul i32 %a, 13
ret i32 %c
Expand All @@ -504,14 +504,14 @@ define i32 @mul21(i32 %a) {
;
; RV32IB-LABEL: mul21:
; RV32IB: # %bb.0:
; RV32IB-NEXT: addi a1, zero, 21
; RV32IB-NEXT: mul a0, a0, a1
; RV32IB-NEXT: sh2add a1, a0, a0
; RV32IB-NEXT: sh2add a0, a1, a0
; RV32IB-NEXT: ret
;
; RV32IBA-LABEL: mul21:
; RV32IBA: # %bb.0:
; RV32IBA-NEXT: addi a1, zero, 21
; RV32IBA-NEXT: mul a0, a0, a1
; RV32IBA-NEXT: sh2add a1, a0, a0
; RV32IBA-NEXT: sh2add a0, a1, a0
; RV32IBA-NEXT: ret
%c = mul i32 %a, 21
ret i32 %c
Expand All @@ -526,14 +526,14 @@ define i32 @mul37(i32 %a) {
;
; RV32IB-LABEL: mul37:
; RV32IB: # %bb.0:
; RV32IB-NEXT: addi a1, zero, 37
; RV32IB-NEXT: mul a0, a0, a1
; RV32IB-NEXT: sh3add a1, a0, a0
; RV32IB-NEXT: sh2add a0, a1, a0
; RV32IB-NEXT: ret
;
; RV32IBA-LABEL: mul37:
; RV32IBA: # %bb.0:
; RV32IBA-NEXT: addi a1, zero, 37
; RV32IBA-NEXT: mul a0, a0, a1
; RV32IBA-NEXT: sh3add a1, a0, a0
; RV32IBA-NEXT: sh2add a0, a1, a0
; RV32IBA-NEXT: ret
%c = mul i32 %a, 37
ret i32 %c
Expand All @@ -548,14 +548,14 @@ define i32 @mul25(i32 %a) {
;
; RV32IB-LABEL: mul25:
; RV32IB: # %bb.0:
; RV32IB-NEXT: addi a1, zero, 25
; RV32IB-NEXT: mul a0, a0, a1
; RV32IB-NEXT: sh1add a1, a0, a0
; RV32IB-NEXT: sh3add a0, a1, a0
; RV32IB-NEXT: ret
;
; RV32IBA-LABEL: mul25:
; RV32IBA: # %bb.0:
; RV32IBA-NEXT: addi a1, zero, 25
; RV32IBA-NEXT: mul a0, a0, a1
; RV32IBA-NEXT: sh1add a1, a0, a0
; RV32IBA-NEXT: sh3add a0, a1, a0
; RV32IBA-NEXT: ret
%c = mul i32 %a, 25
ret i32 %c
Expand All @@ -570,14 +570,14 @@ define i32 @mul41(i32 %a) {
;
; RV32IB-LABEL: mul41:
; RV32IB: # %bb.0:
; RV32IB-NEXT: addi a1, zero, 41
; RV32IB-NEXT: mul a0, a0, a1
; RV32IB-NEXT: sh2add a1, a0, a0
; RV32IB-NEXT: sh3add a0, a1, a0
; RV32IB-NEXT: ret
;
; RV32IBA-LABEL: mul41:
; RV32IBA: # %bb.0:
; RV32IBA-NEXT: addi a1, zero, 41
; RV32IBA-NEXT: mul a0, a0, a1
; RV32IBA-NEXT: sh2add a1, a0, a0
; RV32IBA-NEXT: sh3add a0, a1, a0
; RV32IBA-NEXT: ret
%c = mul i32 %a, 41
ret i32 %c
Expand All @@ -592,14 +592,14 @@ define i32 @mul73(i32 %a) {
;
; RV32IB-LABEL: mul73:
; RV32IB: # %bb.0:
; RV32IB-NEXT: addi a1, zero, 73
; RV32IB-NEXT: mul a0, a0, a1
; RV32IB-NEXT: sh3add a1, a0, a0
; RV32IB-NEXT: sh3add a0, a1, a0
; RV32IB-NEXT: ret
;
; RV32IBA-LABEL: mul73:
; RV32IBA: # %bb.0:
; RV32IBA-NEXT: addi a1, zero, 73
; RV32IBA-NEXT: mul a0, a0, a1
; RV32IBA-NEXT: sh3add a1, a0, a0
; RV32IBA-NEXT: sh3add a0, a1, a0
; RV32IBA-NEXT: ret
%c = mul i32 %a, 73
ret i32 %c
Expand All @@ -614,14 +614,14 @@ define i32 @mul27(i32 %a) {
;
; RV32IB-LABEL: mul27:
; RV32IB: # %bb.0:
; RV32IB-NEXT: addi a1, zero, 27
; RV32IB-NEXT: mul a0, a0, a1
; RV32IB-NEXT: sh3add a0, a0, a0
; RV32IB-NEXT: sh1add a0, a0, a0
; RV32IB-NEXT: ret
;
; RV32IBA-LABEL: mul27:
; RV32IBA: # %bb.0:
; RV32IBA-NEXT: addi a1, zero, 27
; RV32IBA-NEXT: mul a0, a0, a1
; RV32IBA-NEXT: sh3add a0, a0, a0
; RV32IBA-NEXT: sh1add a0, a0, a0
; RV32IBA-NEXT: ret
%c = mul i32 %a, 27
ret i32 %c
Expand All @@ -636,14 +636,14 @@ define i32 @mul45(i32 %a) {
;
; RV32IB-LABEL: mul45:
; RV32IB: # %bb.0:
; RV32IB-NEXT: addi a1, zero, 45
; RV32IB-NEXT: mul a0, a0, a1
; RV32IB-NEXT: sh3add a0, a0, a0
; RV32IB-NEXT: sh2add a0, a0, a0
; RV32IB-NEXT: ret
;
; RV32IBA-LABEL: mul45:
; RV32IBA: # %bb.0:
; RV32IBA-NEXT: addi a1, zero, 45
; RV32IBA-NEXT: mul a0, a0, a1
; RV32IBA-NEXT: sh3add a0, a0, a0
; RV32IBA-NEXT: sh2add a0, a0, a0
; RV32IBA-NEXT: ret
%c = mul i32 %a, 45
ret i32 %c
Expand All @@ -658,14 +658,14 @@ define i32 @mul81(i32 %a) {
;
; RV32IB-LABEL: mul81:
; RV32IB: # %bb.0:
; RV32IB-NEXT: addi a1, zero, 81
; RV32IB-NEXT: mul a0, a0, a1
; RV32IB-NEXT: sh3add a0, a0, a0
; RV32IB-NEXT: sh3add a0, a0, a0
; RV32IB-NEXT: ret
;
; RV32IBA-LABEL: mul81:
; RV32IBA: # %bb.0:
; RV32IBA-NEXT: addi a1, zero, 81
; RV32IBA-NEXT: mul a0, a0, a1
; RV32IBA-NEXT: sh3add a0, a0, a0
; RV32IBA-NEXT: sh3add a0, a0, a0
; RV32IBA-NEXT: ret
%c = mul i32 %a, 81
ret i32 %c
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