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Don't rely in llvm::Bitset CTAD. NFC.
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This triggers a lot of -Wctad-maybe-unsupported
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d0k committed Sep 12, 2023
1 parent 06bb6c8 commit c1796be
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Showing 4 changed files with 5 additions and 5 deletions.
2 changes: 1 addition & 1 deletion clang/lib/Basic/Targets/AArch64.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -979,7 +979,7 @@ bool AArch64TargetInfo::initFeatureMap(
// Parse the CPU and add any implied features.
std::optional<llvm::AArch64::CpuInfo> CpuInfo = llvm::AArch64::parseCpu(CPU);
if (CpuInfo) {
llvm::Bitset Exts = CpuInfo->getImpliedExtensions();
auto Exts = CpuInfo->getImpliedExtensions();
std::vector<StringRef> CPUFeats;
llvm::AArch64::getExtensionFeatures(Exts, CPUFeats);
for (auto F : CPUFeats) {
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2 changes: 1 addition & 1 deletion clang/lib/Driver/ToolChains/Arch/AArch64.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -158,7 +158,7 @@ static bool DecodeAArch64Mcpu(const Driver &D, StringRef Mcpu, StringRef &CPU,

Features.push_back(ArchInfo->ArchFeature);

llvm::Bitset Extension = CpuInfo->getImpliedExtensions();
auto Extension = CpuInfo->getImpliedExtensions();
if (!llvm::AArch64::getExtensionFeatures(Extension, Features))
return false;
}
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2 changes: 1 addition & 1 deletion llvm/include/llvm/TargetParser/AArch64TargetParser.h
Original file line number Diff line number Diff line change
Expand Up @@ -347,7 +347,7 @@ inline constexpr ArchInfo ARMV9_3A = { VersionTuple{9, 3}, AProfile, "armv9.3-a
inline constexpr ArchInfo ARMV9_4A = { VersionTuple{9, 4}, AProfile, "armv9.4-a", "+v9.4a", (ARMV9_3A.DefaultExts |
AArch64::ExtensionBitset({AArch64::AEK_SPECRES2, AArch64::AEK_CSSC, AArch64::AEK_RASv2}))};
// For v8-R, we do not enable crypto and align with GCC that enables a more minimal set of optional architecture extensions.
inline constexpr ArchInfo ARMV8R = { VersionTuple{8, 0}, RProfile, "armv8-r", "+v8r", (Bitset(ARMV8_5A.DefaultExts) |
inline constexpr ArchInfo ARMV8R = { VersionTuple{8, 0}, RProfile, "armv8-r", "+v8r", (ARMV8_5A.DefaultExts |
AArch64::ExtensionBitset({AArch64::AEK_SSBS,
AArch64::AEK_FP16, AArch64::AEK_FP16FML, AArch64::AEK_SB}).flip(AArch64::AEK_LSE))};
// clang-format on
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4 changes: 2 additions & 2 deletions llvm/unittests/TargetParser/TargetParserTest.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -216,7 +216,7 @@ INSTANTIATE_TEST_SUITE_P(
ARMCPUTestParams<uint64_t>("arm1020t", "armv5t", "none", ARM::AEK_NONE, "5T"),
ARMCPUTestParams<uint64_t>("arm9e", "armv5te", "none",
ARM::AEK_NONE | ARM::AEK_DSP, "5TE"),
ARMCPUTestParams("arm946e-s", "armv5te", "none",
ARMCPUTestParams<uint64_t>("arm946e-s", "armv5te", "none",
ARM::AEK_NONE | ARM::AEK_DSP, "5TE"),
ARMCPUTestParams<uint64_t>("arm966e-s", "armv5te", "none",
ARM::AEK_NONE | ARM::AEK_DSP, "5TE"),
Expand Down Expand Up @@ -1015,7 +1015,7 @@ class AArch64CPUTestFixture
ARMCPUTestParams<AArch64::ExtensionBitset>> {};

TEST_P(AArch64CPUTestFixture, testAArch64CPU) {
ARMCPUTestParams params = GetParam();
auto params = GetParam();

const std::optional<AArch64::CpuInfo> Cpu = AArch64::parseCpu(params.CPUName);
EXPECT_TRUE(Cpu);
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2 comments on commit c1796be

@dwblaikie
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If it does the right thing, perhaps we should add an explicit instantiation guide to Bitset?

@d0k
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@d0k d0k commented on c1796be Sep 20, 2023

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If it does the right thing, perhaps we should add an explicit instantiation guide to Bitset?

The llvm::Bitset CTADs here are all just copies of another Bitset. I don't think there is a good way of specifying a deduction guide just for that, when constructing a Bitset from scratch we don't know how big it's supposed to be.

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