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[NFC][InstCombine] Autogenerate assume.ll test
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@LebedevRI
LebedevRI committed Dec 18, 2019
1 parent 0a08139 commit c6a56c9
Showing 1 changed file with 77 additions and 40 deletions.
117 changes: 77 additions & 40 deletions llvm/test/Transforms/InstCombine/assume.ll
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@@ -1,17 +1,23 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -instcombine -S | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

define i32 @foo1(i32* %a) #0 {
; CHECK-LABEL: @foo1(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[A:%.*]], align 32
; CHECK-NEXT: [[PTRINT:%.*]] = ptrtoint i32* [[A]] to i64
; CHECK-NEXT: [[MASKEDPTR:%.*]] = and i64 [[PTRINT]], 31
; CHECK-NEXT: [[MASKCOND:%.*]] = icmp eq i64 [[MASKEDPTR]], 0
; CHECK-NEXT: tail call void @llvm.assume(i1 [[MASKCOND]])
; CHECK-NEXT: ret i32 [[TMP0]]
;
entry:
%0 = load i32, i32* %a, align 4

; Check that the alignment has been upgraded and that the assume has not
; been removed:
; CHECK-LABEL: @foo1
; CHECK-DAG: load i32, i32* %a, align 32
; CHECK-DAG: call void @llvm.assume
; CHECK: ret i32

%ptrint = ptrtoint i32* %a to i64
%maskedptr = and i64 %ptrint, 31
Expand All @@ -22,12 +28,17 @@ entry:
}

define i32 @foo2(i32* %a) #0 {
; CHECK-LABEL: @foo2(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[PTRINT:%.*]] = ptrtoint i32* [[A:%.*]] to i64
; CHECK-NEXT: [[MASKEDPTR:%.*]] = and i64 [[PTRINT]], 31
; CHECK-NEXT: [[MASKCOND:%.*]] = icmp eq i64 [[MASKEDPTR]], 0
; CHECK-NEXT: tail call void @llvm.assume(i1 [[MASKCOND]])
; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 32
; CHECK-NEXT: ret i32 [[TMP0]]
;
entry:
; Same check as in @foo1, but make sure it works if the assume is first too.
; CHECK-LABEL: @foo2
; CHECK-DAG: load i32, i32* %a, align 32
; CHECK-DAG: call void @llvm.assume
; CHECK: ret i32

%ptrint = ptrtoint i32* %a to i64
%maskedptr = and i64 %ptrint, 31
Expand All @@ -41,55 +52,66 @@ entry:
declare void @llvm.assume(i1) #1

define i32 @simple(i32 %a) #1 {
; CHECK-LABEL: @simple(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A:%.*]], 4
; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP]])
; CHECK-NEXT: ret i32 4
;
entry:

; CHECK-LABEL: @simple
; CHECK: call void @llvm.assume
; CHECK: ret i32 4

%cmp = icmp eq i32 %a, 4
tail call void @llvm.assume(i1 %cmp)
ret i32 %a
}

define i32 @can1(i1 %a, i1 %b, i1 %c) {
; CHECK-LABEL: @can1(
; CHECK-NEXT: entry:
; CHECK-NEXT: call void @llvm.assume(i1 [[A:%.*]])
; CHECK-NEXT: call void @llvm.assume(i1 [[B:%.*]])
; CHECK-NEXT: call void @llvm.assume(i1 [[C:%.*]])
; CHECK-NEXT: ret i32 5
;
entry:
%and1 = and i1 %a, %b
%and = and i1 %and1, %c
tail call void @llvm.assume(i1 %and)

; CHECK-LABEL: @can1
; CHECK: call void @llvm.assume(i1 %a)
; CHECK: call void @llvm.assume(i1 %b)
; CHECK: call void @llvm.assume(i1 %c)
; CHECK: ret i32

ret i32 5
}

define i32 @can2(i1 %a, i1 %b, i1 %c) {
; CHECK-LABEL: @can2(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[A:%.*]], true
; CHECK-NEXT: call void @llvm.assume(i1 [[TMP0]])
; CHECK-NEXT: [[TMP1:%.*]] = xor i1 [[B:%.*]], true
; CHECK-NEXT: call void @llvm.assume(i1 [[TMP1]])
; CHECK-NEXT: ret i32 5
;
entry:
%v = or i1 %a, %b
%w = xor i1 %v, 1
tail call void @llvm.assume(i1 %w)

; CHECK-LABEL: @can2
; CHECK: %[[V1:[^ ]+]] = xor i1 %a, true
; CHECK: call void @llvm.assume(i1 %[[V1]])
; CHECK: %[[V2:[^ ]+]] = xor i1 %b, true
; CHECK: call void @llvm.assume(i1 %[[V2]])
; CHECK: ret i32

ret i32 5
}

define i32 @bar1(i32 %a) #0 {
; CHECK-LABEL: @bar1(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[AND:%.*]] = and i32 [[A:%.*]], 7
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 1
; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP]])
; CHECK-NEXT: ret i32 1
;
entry:
%and1 = and i32 %a, 3

; CHECK-LABEL: @bar1
; CHECK: call void @llvm.assume
; CHECK: ret i32 1

%and = and i32 %a, 7
%cmp = icmp eq i32 %and, 1
Expand All @@ -99,10 +121,14 @@ entry:
}

define i32 @bar2(i32 %a) #0 {
; CHECK-LABEL: @bar2(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[AND:%.*]] = and i32 [[A:%.*]], 7
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 1
; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP]])
; CHECK-NEXT: ret i32 1
;
entry:
; CHECK-LABEL: @bar2
; CHECK: call void @llvm.assume
; CHECK: ret i32 1

%and = and i32 %a, 7
%cmp = icmp eq i32 %and, 1
Expand All @@ -113,13 +139,19 @@ entry:
}

define i32 @bar3(i32 %a, i1 %x, i1 %y) #0 {
; CHECK-LABEL: @bar3(
; CHECK-NEXT: entry:
; CHECK-NEXT: tail call void @llvm.assume(i1 [[X:%.*]])
; CHECK-NEXT: [[AND:%.*]] = and i32 [[A:%.*]], 7
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 1
; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP]])
; CHECK-NEXT: tail call void @llvm.assume(i1 [[Y:%.*]])
; CHECK-NEXT: ret i32 1
;
entry:
%and1 = and i32 %a, 3

; Don't be fooled by other assumes around.
; CHECK-LABEL: @bar3
; CHECK: call void @llvm.assume
; CHECK: ret i32 1

tail call void @llvm.assume(i1 %x)

Expand All @@ -133,13 +165,18 @@ entry:
}

define i32 @bar4(i32 %a, i32 %b) {
; CHECK-LABEL: @bar4(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[AND:%.*]] = and i32 [[A:%.*]], 7
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 1
; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP]])
; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[A]], [[B:%.*]]
; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP2]])
; CHECK-NEXT: ret i32 1
;
entry:
%and1 = and i32 %b, 3

; CHECK-LABEL: @bar4
; CHECK: call void @llvm.assume
; CHECK: call void @llvm.assume
; CHECK: ret i32 1

%and = and i32 %a, 7
%cmp = icmp eq i32 %and, 1
Expand Down Expand Up @@ -195,7 +232,7 @@ declare void @escape(i32* %a)

define i1 @nonnull1(i32** %a) {
; CHECK-LABEL: @nonnull1(
; CHECK-NEXT: [[LOAD:%.*]] = load i32*, i32** %a, align 8, !nonnull !6
; CHECK-NEXT: [[LOAD:%.*]] = load i32*, i32** [[A:%.*]], align 8, !nonnull !6
; CHECK-NEXT: tail call void @escape(i32* nonnull [[LOAD]])
; CHECK-NEXT: ret i1 false
;
Expand All @@ -212,7 +249,7 @@ define i1 @nonnull1(i32** %a) {

define i1 @nonnull2(i32* %a) {
; CHECK-LABEL: @nonnull2(
; CHECK-NEXT: [[LOAD:%.*]] = load i32, i32* %a, align 4
; CHECK-NEXT: [[LOAD:%.*]] = load i32, i32* [[A:%.*]], align 4
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[LOAD]], 0
; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP]])
; CHECK-NEXT: [[RVAL:%.*]] = icmp eq i32 [[LOAD]], 0
Expand All @@ -231,8 +268,8 @@ define i1 @nonnull2(i32* %a) {
define i1 @nonnull3(i32** %a, i1 %control) {
; CHECK-LABEL: @nonnull3(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[LOAD:%.*]] = load i32*, i32** %a, align 8
; CHECK-NEXT: br i1 %control, label %taken, label %not_taken
; CHECK-NEXT: [[LOAD:%.*]] = load i32*, i32** [[A:%.*]], align 8
; CHECK-NEXT: br i1 [[CONTROL:%.*]], label [[TAKEN:%.*]], label [[NOT_TAKEN:%.*]]
; CHECK: taken:
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32* [[LOAD]], null
; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP]])
Expand All @@ -259,7 +296,7 @@ not_taken:

define i1 @nonnull4(i32** %a) {
; CHECK-LABEL: @nonnull4(
; CHECK-NEXT: [[LOAD:%.*]] = load i32*, i32** %a, align 8
; CHECK-NEXT: [[LOAD:%.*]] = load i32*, i32** [[A:%.*]], align 8
; CHECK-NEXT: tail call void @escape(i32* [[LOAD]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32* [[LOAD]], null
; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP]])
Expand Down

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