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[Instcombine] Add coverage for demanded bits of insertelement
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preames committed Oct 24, 2022
1 parent bd7949b commit c782a93
Showing 1 changed file with 27 additions and 0 deletions.
27 changes: 27 additions & 0 deletions llvm/test/Transforms/InstCombine/insertelement.ll
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -passes=instcombine -S | FileCheck %s

define <4 x i32> @insert_known_idx(<4 x i32> %x) {
; CHECK-LABEL: @insert_known_idx(
; CHECK-NEXT: [[V1:%.*]] = and <4 x i32> [[X:%.*]], <i32 poison, i32 7, i32 7, i32 7>
; CHECK-NEXT: [[V2:%.*]] = insertelement <4 x i32> [[V1]], i32 6, i64 0
; CHECK-NEXT: ret <4 x i32> [[V2]]
;
%v1 = and <4 x i32> %x, <i32 7, i32 7, i32 7, i32 7>
%v2 = insertelement <4 x i32> %v1, i32 6, i32 0
%v3 = and <4 x i32> %v2, <i32 7, i32 7, i32 7, i32 7>
ret <4 x i32> %v3
}

define <4 x i32> @insert_unknown_idx(<4 x i32> %x, i32 %idx) {
; CHECK-LABEL: @insert_unknown_idx(
; CHECK-NEXT: [[V1:%.*]] = and <4 x i32> [[X:%.*]], <i32 7, i32 7, i32 7, i32 7>
; CHECK-NEXT: [[V2:%.*]] = insertelement <4 x i32> [[V1]], i32 6, i32 [[IDX:%.*]]
; CHECK-NEXT: [[V3:%.*]] = and <4 x i32> [[V2]], <i32 7, i32 7, i32 7, i32 7>
; CHECK-NEXT: ret <4 x i32> [[V3]]
;
%v1 = and <4 x i32> %x, <i32 7, i32 7, i32 7, i32 7>
%v2 = insertelement <4 x i32> %v1, i32 6, i32 %idx
%v3 = and <4 x i32> %v2, <i32 7, i32 7, i32 7, i32 7>
ret <4 x i32> %v3
}

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