Skip to content

Commit

Permalink
[PowerPC] Define XL-compatible macros only for AIX and Linux
Browse files Browse the repository at this point in the history 
Since XLC only ever shipped on PowerPC AIX and Linux, it is not reasonable to
provide the compatibility macros on any target other than those two. This patch
restricts those macros to AIX/Linux.

Differential revision: https://reviews.llvm.org/D110213
  • Loading branch information
@nemanjai
nemanjai committed Sep 29, 2021
1 parent 6709b19 commit c9539f9
Show file tree
Hide file tree
Showing 36 changed files with 111 additions and 97 deletions.
5 changes: 4 additions & 1 deletion clang/lib/Basic/Targets/PPC.cpp
View file
Expand Up @@ -250,7 +250,10 @@ static void defineXLCompatMacros(MacroBuilder &Builder) {
void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
MacroBuilder &Builder) const {

defineXLCompatMacros(Builder);
// We define the XLC compatibility macros only on AIX and Linux since XLC
// was never available on any other platforms.
if (getTriple().isOSAIX() || getTriple().isOSLinux())
defineXLCompatMacros(Builder);

// Target identification.
Builder.defineMacro("__ppc__");
Expand Down
4 changes: 2 additions & 2 deletions clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond-64bit-only.c
View file
Expand Up @@ -3,9 +3,9 @@
// RUN: FileCheck %s --check-prefix=CHECK32-ERROR
// RUN: %clang_cc1 -O2 -triple=powerpc64-unknown-aix -emit-llvm %s -o - | \
// RUN: FileCheck %s --check-prefix=CHECK64
// RUN: %clang_cc1 -O2 -triple=powerpc64le-unknown-unknown -emit-llvm %s \
// RUN: %clang_cc1 -O2 -triple=powerpc64le-unknown-linux-gnu -emit-llvm %s \
// RUN: -o - | FileCheck %s --check-prefix=CHECK64
// RUN: %clang_cc1 -O2 -triple=powerpc64-unknown-unknown -emit-llvm %s \
// RUN: %clang_cc1 -O2 -triple=powerpc64-unknown-linux-gnu -emit-llvm %s \
// RUN: -o - | FileCheck %s --check-prefix=CHECK64

long test_ldarx(volatile long* a) {
Expand Down
4 changes: 2 additions & 2 deletions clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-StoreCond.c
View file
Expand Up @@ -3,9 +3,9 @@
// RUN: -emit-llvm %s -o - | FileCheck %s
// RUN: %clang_cc1 -O2 -target-cpu pwr8 -triple=powerpc64-unknown-aix \
// RUN: -emit-llvm %s -o - | FileCheck %s
// RUN: %clang_cc1 -O2 -target-cpu pwr8 -triple=powerpc64le-unknown-unknown \
// RUN: %clang_cc1 -O2 -target-cpu pwr8 -triple=powerpc64le-unknown-linux-gnu \
// RUN: -emit-llvm %s -o - | FileCheck %s
// RUN: %clang_cc1 -O2 -target-cpu pwr8 -triple=powerpc64-unknown-unknown \
// RUN: %clang_cc1 -O2 -target-cpu pwr8 -triple=powerpc64-unknown-linux-gnu \
// RUN: -emit-llvm %s -o - | FileCheck %s
// RAUN: not %clang_cc1 -O2 -target-cpu pwr7 -triple=powerpc-unknown-aix \
// RAUN: -emit-llvm %s -o - 2>&1 | FileCheck %s \
Expand Down
4 changes: 2 additions & 2 deletions clang/test/CodeGen/builtins-ppc-xlcompat-cas.c
View file
@@ -1,8 +1,8 @@
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
// REQUIRES: powerpc-registered-target
// RUN: %clang_cc1 -triple powerpc64-unknown-unknown \
// RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu \
// RUN: -emit-llvm %s -o - -target-cpu pwr8 | FileCheck %s
// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown \
// RUN: %clang_cc1 -triple powerpc64le-unknown-linux-gnu \
// RUN: -emit-llvm %s -o - -target-cpu pwr8 | FileCheck %s


Expand Down
8 changes: 4 additions & 4 deletions clang/test/CodeGen/builtins-ppc-xlcompat-cipher.c
View file
@@ -1,13 +1,13 @@
// REQUIRES: powerpc-registered-target
// RUN: %clang_cc1 -triple powerpc64-unknown-unknown \
// RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu \
// RUN: -emit-llvm %s -o - -target-cpu pwr8 | FileCheck %s
// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown \
// RUN: %clang_cc1 -triple powerpc64le-unknown-linux-gnu \
// RUN: -emit-llvm %s -o - -target-cpu pwr8 | FileCheck %s
// RUN: %clang_cc1 -triple powerpc64-unknown-aix \
// RUN: -emit-llvm %s -o - -target-cpu pwr8 | FileCheck %s
// RUN: %clang_cc1 -triple powerpc-unknown-unknown \
// RUN: %clang_cc1 -triple powerpc-unknown-linux-gnu \
// RUN: -emit-llvm %s -o - -target-cpu pwr8 | FileCheck %s
// RUN: %clang_cc1 -triple powerpcle-unknown-unknown \
// RUN: %clang_cc1 -triple powerpcle-unknown-linux-gnu \
// RUN: -emit-llvm %s -o - -target-cpu pwr8 | FileCheck %s
// RUN: %clang_cc1 -triple powerpc-unknown-aix \
// RUN: -emit-llvm %s -o - -target-cpu pwr8 | FileCheck %s
Expand Down
52 changes: 31 additions & 21 deletions clang/test/CodeGen/builtins-ppc-xlcompat-cmplx.c
View file
@@ -1,14 +1,14 @@
// REQUIRES: powerpc-registered-target
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
// RUN: %clang_cc1 -triple powerpc64-unknown-unknown \
// REQUIRES: powerpc-registered-target
// RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu \
// RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s --check-prefix=64BIT
// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown \
// RUN: %clang_cc1 -triple powerpc64le-unknown-linux-gnu \
// RUN: -emit-llvm %s -o - -target-cpu pwr8 | FileCheck %s --check-prefix=64BITLE
// RUN: %clang_cc1 -triple powerpc64-unknown-aix \
// RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s --check-prefix=64BITAIX
// RUN: %clang_cc1 -triple powerpc-unknown-unknown \
// RUN: %clang_cc1 -triple powerpc-unknown-linux-gnu \
// RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s --check-prefix=32BIT
// RUN: %clang_cc1 -triple powerpcle-unknown-unknown \
// RUN: %clang_cc1 -triple powerpcle-unknown-linux-gnu \
// RUN: -emit-llvm %s -o - -target-cpu pwr8 | FileCheck %s --check-prefix=32BITLE
// RUN: %clang_cc1 -triple powerpc-unknown-aix \
// RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s --check-prefix=32BITAIX
Expand Down Expand Up @@ -175,37 +175,47 @@ double _Complex testcmplx(double real, double imag) {
//
// 32BIT-LABEL: @testcmplxf(
// 32BIT-NEXT: entry:
// 32BIT-NEXT: [[RETVAL:%.*]] = alloca { float, float }, align 4
// 32BIT-NEXT: [[REAL_ADDR:%.*]] = alloca float, align 4
// 32BIT-NEXT: [[IMAG_ADDR:%.*]] = alloca float, align 4
// 32BIT-NEXT: store float [[REAL:%.*]], float* [[REAL_ADDR]], align 4
// 32BIT-NEXT: store float [[IMAG:%.*]], float* [[IMAG_ADDR]], align 4
// 32BIT-NEXT: [[TMP0:%.*]] = load float, float* [[REAL_ADDR]], align 4
// 32BIT-NEXT: [[TMP1:%.*]] = load float, float* [[IMAG_ADDR]], align 4
// 32BIT-NEXT: [[RETVAL_REALP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[RETVAL]], i32 0, i32 0
// 32BIT-NEXT: [[RETVAL_IMAGP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[RETVAL]], i32 0, i32 1
// 32BIT-NEXT: store float [[TMP0]], float* [[RETVAL_REALP]], align 4
// 32BIT-NEXT: store float [[TMP1]], float* [[RETVAL_IMAGP]], align 4
// 32BIT-NEXT: [[TMP2:%.*]] = bitcast { float, float }* [[RETVAL]] to i64*
// 32BIT-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP2]], align 4
// 32BIT-NEXT: ret i64 [[TMP3]]
// 32BIT-NEXT: [[AGG_RESULT_REALP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[AGG_RESULT:%.*]], i32 0, i32 0
// 32BIT-NEXT: [[AGG_RESULT_IMAGP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[AGG_RESULT]], i32 0, i32 1
// 32BIT-NEXT: store float [[TMP0]], float* [[AGG_RESULT_REALP]], align 4
// 32BIT-NEXT: store float [[TMP1]], float* [[AGG_RESULT_IMAGP]], align 4
// 32BIT-NEXT: [[AGG_RESULT_REALP1:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[AGG_RESULT]], i32 0, i32 0
// 32BIT-NEXT: [[AGG_RESULT_REAL:%.*]] = load float, float* [[AGG_RESULT_REALP1]], align 4
// 32BIT-NEXT: [[AGG_RESULT_IMAGP2:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[AGG_RESULT]], i32 0, i32 1
// 32BIT-NEXT: [[AGG_RESULT_IMAG:%.*]] = load float, float* [[AGG_RESULT_IMAGP2]], align 4
// 32BIT-NEXT: [[AGG_RESULT_REALP3:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[AGG_RESULT]], i32 0, i32 0
// 32BIT-NEXT: [[AGG_RESULT_IMAGP4:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[AGG_RESULT]], i32 0, i32 1
// 32BIT-NEXT: store float [[AGG_RESULT_REAL]], float* [[AGG_RESULT_REALP3]], align 4
// 32BIT-NEXT: store float [[AGG_RESULT_IMAG]], float* [[AGG_RESULT_IMAGP4]], align 4
// 32BIT-NEXT: ret void
//
// 32BITLE-LABEL: @testcmplxf(
// 32BITLE-NEXT: entry:
// 32BITLE-NEXT: [[RETVAL:%.*]] = alloca { float, float }, align 4
// 32BITLE-NEXT: [[REAL_ADDR:%.*]] = alloca float, align 4
// 32BITLE-NEXT: [[IMAG_ADDR:%.*]] = alloca float, align 4
// 32BITLE-NEXT: store float [[REAL:%.*]], float* [[REAL_ADDR]], align 4
// 32BITLE-NEXT: store float [[IMAG:%.*]], float* [[IMAG_ADDR]], align 4
// 32BITLE-NEXT: [[TMP0:%.*]] = load float, float* [[REAL_ADDR]], align 4
// 32BITLE-NEXT: [[TMP1:%.*]] = load float, float* [[IMAG_ADDR]], align 4
// 32BITLE-NEXT: [[RETVAL_REALP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[RETVAL]], i32 0, i32 0
// 32BITLE-NEXT: [[RETVAL_IMAGP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[RETVAL]], i32 0, i32 1
// 32BITLE-NEXT: store float [[TMP0]], float* [[RETVAL_REALP]], align 4
// 32BITLE-NEXT: store float [[TMP1]], float* [[RETVAL_IMAGP]], align 4
// 32BITLE-NEXT: [[TMP2:%.*]] = bitcast { float, float }* [[RETVAL]] to i64*
// 32BITLE-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP2]], align 4
// 32BITLE-NEXT: ret i64 [[TMP3]]
// 32BITLE-NEXT: [[AGG_RESULT_REALP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[AGG_RESULT:%.*]], i32 0, i32 0
// 32BITLE-NEXT: [[AGG_RESULT_IMAGP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[AGG_RESULT]], i32 0, i32 1
// 32BITLE-NEXT: store float [[TMP0]], float* [[AGG_RESULT_REALP]], align 4
// 32BITLE-NEXT: store float [[TMP1]], float* [[AGG_RESULT_IMAGP]], align 4
// 32BITLE-NEXT: [[AGG_RESULT_REALP1:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[AGG_RESULT]], i32 0, i32 0
// 32BITLE-NEXT: [[AGG_RESULT_REAL:%.*]] = load float, float* [[AGG_RESULT_REALP1]], align 4
// 32BITLE-NEXT: [[AGG_RESULT_IMAGP2:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[AGG_RESULT]], i32 0, i32 1
// 32BITLE-NEXT: [[AGG_RESULT_IMAG:%.*]] = load float, float* [[AGG_RESULT_IMAGP2]], align 4
// 32BITLE-NEXT: [[AGG_RESULT_REALP3:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[AGG_RESULT]], i32 0, i32 0
// 32BITLE-NEXT: [[AGG_RESULT_IMAGP4:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[AGG_RESULT]], i32 0, i32 1
// 32BITLE-NEXT: store float [[AGG_RESULT_REAL]], float* [[AGG_RESULT_REALP3]], align 4
// 32BITLE-NEXT: store float [[AGG_RESULT_IMAG]], float* [[AGG_RESULT_IMAGP4]], align 4
// 32BITLE-NEXT: ret void
//
// 32BITAIX-LABEL: @testcmplxf(
// 32BITAIX-NEXT: entry:
Expand Down
4 changes: 2 additions & 2 deletions clang/test/CodeGen/builtins-ppc-xlcompat-compare.c
View file
@@ -1,7 +1,7 @@
// REQUIRES: powerpc-registered-target
// RUN: %clang_cc1 -triple powerpc64-unknown-unknown \
// RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu \
// RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s --check-prefix=CHECK-64B
// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown \
// RUN: %clang_cc1 -triple powerpc64le-unknown-linux-gnu \
// RUN: -emit-llvm %s -o - -target-cpu pwr8 | FileCheck %s --check-prefix=CHECK-64B
// RUN: %clang_cc1 -triple powerpc-unknown-aix \
// RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s --check-prefix=CHECK-32B
Expand Down
4 changes: 2 additions & 2 deletions clang/test/CodeGen/builtins-ppc-xlcompat-conversionfunc.c
View file
@@ -1,7 +1,7 @@
// REQUIRES: powerpc-registered-target
// RUN: %clang_cc1 -O2 -triple powerpc64-unknown-unknown \
// RUN: %clang_cc1 -O2 -triple powerpc64-unknown-linux-gnu \
// RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
// RUN: %clang_cc1 -O2 -triple powerpc64le-unknown-unknown \
// RUN: %clang_cc1 -O2 -triple powerpc64le-unknown-linux-gnu \
// RUN: -emit-llvm %s -o - -target-cpu pwr8 | FileCheck %s
// RUN: %clang_cc1 -O2 -triple powerpc-unknown-aix \
// RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
Expand Down
8 changes: 4 additions & 4 deletions clang/test/CodeGen/builtins-ppc-xlcompat-darn.c
View file
@@ -1,16 +1,16 @@
// REQUIRES: powerpc-registered-target
// RUN: %clang_cc1 -triple powerpc64-unknown-unknown \
// RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu \
// RUN: -emit-llvm %s -o - -target-cpu pwr9 | \
// RUN: FileCheck %s --check-prefix=CHECK-64
// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown \
// RUN: %clang_cc1 -triple powerpc64le-unknown-linux-gnu \
// RUN: -emit-llvm %s -o - -target-cpu pwr9 | \
// RUN: FileCheck %s --check-prefix=CHECK-64
// RUN: %clang_cc1 -triple powerpc64-unknown-aix \
// RUN: -emit-llvm %s -o - -target-cpu pwr9 | \
// RUN: FileCheck %s --check-prefix=CHECK-64
// RUN: %clang_cc1 -triple powerpc-unknown-unknown \
// RUN: %clang_cc1 -triple powerpc-unknown-linux-gnu \
// RUN: -emit-llvm %s -o - -target-cpu pwr9 | FileCheck %s
// RUN: %clang_cc1 -triple powerpcle-unknown-unknown \
// RUN: %clang_cc1 -triple powerpcle-unknown-linux-gnu \
// RUN: -emit-llvm %s -o - -target-cpu pwr9 | FileCheck %s
// RUN: %clang_cc1 -triple powerpc-unknown-aix \
// RUN: -emit-llvm %s -o - -target-cpu pwr9 | FileCheck %s
Expand Down
4 changes: 2 additions & 2 deletions clang/test/CodeGen/builtins-ppc-xlcompat-error.c
View file
@@ -1,7 +1,7 @@
// REQUIRES: powerpc-registered-target
// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -fsyntax-only \
// RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu -fsyntax-only \
// RUN: -Wall -Werror -verify %s
// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown -fsyntax-only \
// RUN: %clang_cc1 -triple powerpc64le-unknown-linux-gnu -fsyntax-only \
// RUN: -Wall -Werror -verify %s
// RUN: %clang_cc1 -triple powerpc64-unknown-aix -fsyntax-only \
// RUN: -Wall -Werror -verify %s
Expand Down
8 changes: 4 additions & 4 deletions clang/test/CodeGen/builtins-ppc-xlcompat-expect.c
View file
@@ -1,13 +1,13 @@
// REQUIRES: powerpc-registered-target
// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -O1 -disable-llvm-passes \
// RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu -O1 -disable-llvm-passes \
// RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s --check-prefix=64BIT
// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown -O1 -disable-llvm-passes \
// RUN: %clang_cc1 -triple powerpc64le-unknown-linux-gnu -O1 -disable-llvm-passes \
// RUN: -emit-llvm %s -o - -target-cpu pwr8 | FileCheck %s --check-prefix=64BIT
// RUN: %clang_cc1 -triple powerpc64-unknown-aix -O1 -disable-llvm-passes \
// RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s --check-prefix=64BIT
// RUN: %clang_cc1 -triple powerpc-unknown-unknown -O1 -disable-llvm-passes \
// RUN: %clang_cc1 -triple powerpc-unknown-linux-gnu -O1 -disable-llvm-passes \
// RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s --check-prefix=32BIT
// RUN: %clang_cc1 -triple powerpcle-unknown-unknown -O1 -disable-llvm-passes \
// RUN: %clang_cc1 -triple powerpcle-unknown-linux-gnu -O1 -disable-llvm-passes \
// RUN: -emit-llvm %s -o - -target-cpu pwr8 | FileCheck %s --check-prefix=32BIT
// RUN: %clang_cc1 -triple powerpc-unknown-aix -O1 -disable-llvm-passes \
// RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s --check-prefix=32BIT
Expand Down
4 changes: 2 additions & 2 deletions clang/test/CodeGen/builtins-ppc-xlcompat-fetch.c
View file
@@ -1,8 +1,8 @@
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
// REQUIRES: powerpc-registered-target
// RUN: %clang_cc1 -triple powerpc64-unknown-unknown \
// RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu \
// RUN: -emit-llvm %s -o - -target-cpu pwr8 | FileCheck %s
// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown \
// RUN: %clang_cc1 -triple powerpc64le-unknown-linux-gnu \
// RUN: -emit-llvm %s -o - -target-cpu pwr8 | FileCheck %s

// CHECK-LABEL: @test_builtin_ppc_fetch_and_add(
Expand Down
2 changes: 1 addition & 1 deletion clang/test/CodeGen/builtins-ppc-xlcompat-fp.c
View file
@@ -1,5 +1,5 @@
// REQUIRES: powerpc-registered-target
// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown \
// RUN: %clang_cc1 -triple powerpc64le-unknown-linux-gnu \
// RUN: -emit-llvm %s -o - -target-cpu pwr8 | FileCheck %s
// RUN: %clang_cc1 -triple powerpc64-unknown-aix \
// RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
Expand Down
4 changes: 2 additions & 2 deletions clang/test/CodeGen/builtins-ppc-xlcompat-load-store-reversed-64bit-only.c
View file
@@ -1,7 +1,7 @@
// REQUIRES: powerpc-registered-target.
// RUN: %clang_cc1 -triple powerpc64-unknown-unknown \
// RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu \
// RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown \
// RUN: %clang_cc1 -triple powerpc64le-unknown-linux-gnu \
// RUN: -emit-llvm %s -o - -target-cpu pwr8 | FileCheck %s
// RUN: %clang_cc1 -triple powerpc64-unknown-aix \
// RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
Expand Down
4 changes: 2 additions & 2 deletions clang/test/CodeGen/builtins-ppc-xlcompat-load-store-reversed.c
View file
@@ -1,7 +1,7 @@
// REQUIRES: powerpc-registered-target.
// RUN: %clang_cc1 -triple powerpc64-unknown-unknown \
// RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu \
// RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown \
// RUN: %clang_cc1 -triple powerpc64le-unknown-linux-gnu \
// RUN: -emit-llvm %s -o - -target-cpu pwr8 | FileCheck %s
// RUN: %clang_cc1 -triple powerpc-unknown-aix \
// RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s --check-prefixes=CHECK-32B
Expand Down
4 changes: 2 additions & 2 deletions clang/test/CodeGen/builtins-ppc-xlcompat-macros.c
View file
@@ -1,7 +1,7 @@
// REQUIRES: powerpc-registered-target
// RUN: %clang_cc1 -triple powerpc64-unknown-unknown \
// RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu \
// RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s --check-prefixes=64BIT --check-prefix=BOTH
// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown \
// RUN: %clang_cc1 -triple powerpc64le-unknown-linux-gnu \
// RUN: -emit-llvm %s -o - -target-cpu pwr8 | FileCheck %s --check-prefixes=64BIT --check-prefix=BOTH
// RUN: %clang_cc1 -triple powerpc-unknown-aix \
// RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s --check-prefixes=32BIT --check-prefix=BOTH
Expand Down
4 changes: 2 additions & 2 deletions clang/test/CodeGen/builtins-ppc-xlcompat-math.c
View file
@@ -1,6 +1,6 @@
// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s \
// RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu -emit-llvm %s \
// RUN: -target-cpu pwr7 -o - | FileCheck %s
// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown -emit-llvm %s \
// RUN: %clang_cc1 -triple powerpc64le-unknown-linux-gnu -emit-llvm %s \
// RUN: -target-cpu pwr8 -o - | FileCheck %s
// RUN: %clang_cc1 -triple powerpc64-unknown-aix -emit-llvm %s \
// RUN: -target-cpu pwr7 -o - | FileCheck %s
Expand Down
4 changes: 2 additions & 2 deletions clang/test/CodeGen/builtins-ppc-xlcompat-move-tofrom-regs.c
View file
@@ -1,6 +1,6 @@
// RUN: %clang_cc1 -O2 -triple powerpc64-unknown-unknown \
// RUN: %clang_cc1 -O2 -triple powerpc64-unknown-linux-gnu \
// RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
// RUN: %clang_cc1 -O2 -triple powerpc64le-unknown-unknown \
// RUN: %clang_cc1 -O2 -triple powerpc64le-unknown-linux-gnu \
// RUN: -emit-llvm %s -o - -target-cpu pwr8 | FileCheck %s
// RUN: %clang_cc1 -O2 -triple powerpc-unknown-aix \
// RUN: -emit-llvm %s -o - -target-cpu pwr7 | \
Expand Down
4 changes: 2 additions & 2 deletions clang/test/CodeGen/builtins-ppc-xlcompat-multiply-64bit-only.c
View file
@@ -1,7 +1,7 @@
// REQUIRES: powerpc-registered-target
// RUN: %clang_cc1 -triple powerpc64-unknown-unknown \
// RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu \
// RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown \
// RUN: %clang_cc1 -triple powerpc64le-unknown-linux-gnu \
// RUN: -emit-llvm %s -o - -target-cpu pwr8 | FileCheck %s
// RUN: %clang_cc1 -triple powerpc64-unknown-aix \
// RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
Expand Down
4 changes: 2 additions & 2 deletions clang/test/CodeGen/builtins-ppc-xlcompat-multiply.c
View file
@@ -1,7 +1,7 @@
// REQUIRES: powerpc-registered-target
// RUN: %clang_cc1 -triple powerpc64-unknown-unknown \
// RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu \
// RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown \
// RUN: %clang_cc1 -triple powerpc64le-unknown-linux-gnu \
// RUN: -emit-llvm %s -o - -target-cpu pwr8 | FileCheck %s
// RUN: %clang_cc1 -triple powerpc-unknown-aix \
// RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
Expand Down
4 changes: 2 additions & 2 deletions clang/test/CodeGen/builtins-ppc-xlcompat-popcnt.c
View file
@@ -1,7 +1,7 @@
// REQUIRES: powerpc-registered-target
// RUN: %clang_cc1 -triple powerpc64-unknown-unknown \
// RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu \
// RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown \
// RUN: %clang_cc1 -triple powerpc64le-unknown-linux-gnu \
// RUN: -emit-llvm %s -o - -target-cpu pwr8 | FileCheck %s
// RUN: %clang_cc1 -triple powerpc-unknown-aix \
// RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
Expand Down
4 changes: 2 additions & 2 deletions clang/test/CodeGen/builtins-ppc-xlcompat-prefetch.c
View file
@@ -1,6 +1,6 @@
// RUN: %clang_cc1 -O2 -triple powerpc64-unknown-unknown \
// RUN: %clang_cc1 -O2 -triple powerpc64-unknown-linux-gnu \
// RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
// RUN: %clang_cc1 -O2 -triple powerpc64le-unknown-unknown \
// RUN: %clang_cc1 -O2 -triple powerpc64le-unknown-linux-gnu \
// RUN: -emit-llvm %s -o - -target-cpu pwr8 | FileCheck %s
// RUN: %clang_cc1 -O2 -triple powerpc-unknown-aix \
// RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
Expand Down

0 comments on commit c9539f9

Please sign in to comment.