[RISCV][GlobalISel] Legalize add/sub for wide and non-pow2 types

Legalize G_ADD, G_SUB, G_(S/U)ADD(O/E). We test for (s7, s48, s64, s96) on rv32 and (s15, s72, s128, s192) on rv64. Differential Revision: https://reviews.llvm.org/D157019
llvm · Aug 7, 2023 · cd61e8d · cd61e8d
1 parent 9abc1e0
commit cd61e8d
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diff --git a/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp b/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
@@ -30,6 +30,13 @@ RISCVLegalizerInfo::RISCVLegalizerInfo(const RISCVSubtarget &ST) {
       .widenScalarToNextPow2(0)
       .clampScalar(0, XLenLLT, XLenLLT);
 
+  getActionDefinitionsBuilder(
+      {G_UADDE, G_UADDO, G_USUBE, G_USUBO, G_SADDE, G_SADDO, G_SSUBE, G_SSUBO})
+      .legalFor({{XLenLLT, XLenLLT}})
+      .clampScalar(0, XLenLLT, XLenLLT)
+      .clampScalar(1, XLenLLT, XLenLLT)
+      .widenScalarToNextPow2(0);
+
   getActionDefinitionsBuilder({G_ASHR, G_LSHR, G_SHL})
       .legalFor({{XLenLLT, XLenLLT}})
       .widenScalarToNextPow2(0)

diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-add.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-add.mir
@@ -2,6 +2,26 @@
 # RUN: llc -mtriple=riscv32 -run-pass=legalizer %s -o - \
 # RUN: | FileCheck %s
 ---
+name:            add_i7
+body:             |
+  bb.0.entry:
+    ; CHECK-LABEL: name: add_i7
+    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
+    ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[COPY1]]
+    ; CHECK-NEXT: $x10 = COPY [[ADD]](s32)
+    ; CHECK-NEXT: PseudoRET implicit $x10
+    %0:_(s32) = COPY $x10
+    %1:_(s32) = COPY $x11
+    %2:_(s7) = G_TRUNC %0(s32)
+    %3:_(s7) = G_TRUNC %1(s32)
+    %4:_(s7) = G_ADD %2, %3
+    %5:_(s32) = G_ANYEXT %4(s7)
+    $x10 = COPY %5(s32)
+    PseudoRET implicit $x10
+
+...
+---
 name:            add_i8
 body:             |
   bb.0.entry:
@@ -58,3 +78,102 @@ body:             |
     PseudoRET implicit $x10
 
 ...
+---
+name:            add_i48
+body:             |
+  bb.0.entry:
+    ; CHECK-LABEL: name: add_i48
+    ; CHECK: %xhi:_(s32) = COPY $x10
+    ; CHECK-NEXT: %xlo:_(s32) = COPY $x11
+    ; CHECK-NEXT: %yhi:_(s32) = COPY $x12
+    ; CHECK-NEXT: %ylo:_(s32) = COPY $x13
+    ; CHECK-NEXT: [[UADDO:%[0-9]+]]:_(s32), [[UADDO1:%[0-9]+]]:_(s32) = G_UADDO %xhi, %yhi
+    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
+    ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[UADDO1]], [[C]]
+    ; CHECK-NEXT: [[UADDE:%[0-9]+]]:_(s32), [[UADDE1:%[0-9]+]]:_(s32) = G_UADDE %xlo, %ylo, [[AND]]
+    ; CHECK-NEXT: $x10 = COPY [[UADDO]](s32)
+    ; CHECK-NEXT: $x11 = COPY [[UADDE]](s32)
+    ; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
+    %xhi:_(s32) = COPY $x10
+    %xlo:_(s32) = COPY $x11
+    %yhi:_(s32) = COPY $x12
+    %ylo:_(s32) = COPY $x13
+    %x0:_(s64) = G_MERGE_VALUES %xhi(s32), %xlo(s32)
+    %y0:_(s64) = G_MERGE_VALUES %yhi(s32), %ylo(s32)
+    %x:_(s48) = G_TRUNC %x0(s64)
+    %y:_(s48) = G_TRUNC %y0(s64)
+    %z:_(s48) = G_ADD %x, %y
+    %z0:_(s64) = G_ANYEXT %z(s48)
+    %zhi:_(s32), %zlo:_(s32) = G_UNMERGE_VALUES %z0(s64)
+    $x10 = COPY %zhi(s32)
+    $x11 = COPY %zlo(s32)
+    PseudoRET implicit $x10, implicit $x11
+
+...
+---
+name:            add_i64
+body:             |
+  bb.0.entry:
+    ; CHECK-LABEL: name: add_i64
+    ; CHECK: %hi1:_(s32) = COPY $x10
+    ; CHECK-NEXT: %lo1:_(s32) = COPY $x11
+    ; CHECK-NEXT: %hi2:_(s32) = COPY $x12
+    ; CHECK-NEXT: %lo2:_(s32) = COPY $x13
+    ; CHECK-NEXT: [[UADDO:%[0-9]+]]:_(s32), [[UADDO1:%[0-9]+]]:_(s32) = G_UADDO %hi1, %hi2
+    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
+    ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[UADDO1]], [[C]]
+    ; CHECK-NEXT: [[UADDE:%[0-9]+]]:_(s32), [[UADDE1:%[0-9]+]]:_(s32) = G_UADDE %lo1, %lo2, [[AND]]
+    ; CHECK-NEXT: $x10 = COPY [[UADDO]](s32)
+    ; CHECK-NEXT: $x11 = COPY [[UADDE]](s32)
+    ; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
+    %hi1:_(s32) = COPY $x10
+    %lo1:_(s32) = COPY $x11
+    %hi2:_(s32) = COPY $x12
+    %lo2:_(s32) = COPY $x13
+    %x1:_(s64) = G_MERGE_VALUES %hi1(s32), %lo1(s32)
+    %x2:_(s64) = G_MERGE_VALUES %hi2(s32), %lo2(s32)
+    %y:_(s64) = G_ADD %x1, %x2
+    %hiy:_(s32), %loy:_(s32) = G_UNMERGE_VALUES %y(s64)
+    $x10 = COPY %hiy(s32)
+    $x11 = COPY %loy(s32)
+    PseudoRET implicit $x10, implicit $x11
+
+...
+---
+name:            add_i96
+body:             |
+  bb.0.entry:
+    ; CHECK-LABEL: name: add_i96
+    ; CHECK: %hi1:_(s32) = COPY $x10
+    ; CHECK-NEXT: %mid1:_(s32) = COPY $x11
+    ; CHECK-NEXT: %lo1:_(s32) = COPY $x12
+    ; CHECK-NEXT: %hi2:_(s32) = COPY $x13
+    ; CHECK-NEXT: %mid2:_(s32) = COPY $x14
+    ; CHECK-NEXT: %lo2:_(s32) = COPY $x15
+    ; CHECK-NEXT: [[UADDO:%[0-9]+]]:_(s32), [[UADDO1:%[0-9]+]]:_(s32) = G_UADDO %hi1, %hi2
+    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
+    ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[UADDO1]], [[C]]
+    ; CHECK-NEXT: [[UADDE:%[0-9]+]]:_(s32), [[UADDE1:%[0-9]+]]:_(s32) = G_UADDE %mid1, %mid2, [[AND]]
+    ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
+    ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[UADDE1]], [[C1]]
+    ; CHECK-NEXT: [[UADDE2:%[0-9]+]]:_(s32), [[UADDE3:%[0-9]+]]:_(s32) = G_UADDE %lo1, %lo2, [[AND1]]
+    ; CHECK-NEXT: $x10 = COPY [[UADDO]](s32)
+    ; CHECK-NEXT: $x11 = COPY [[UADDE]](s32)
+    ; CHECK-NEXT: $x12 = COPY [[UADDE2]](s32)
+    ; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11, implicit $x12
+    %hi1:_(s32) = COPY $x10
+    %mid1:_(s32) = COPY $x11
+    %lo1:_(s32) = COPY $x12
+    %hi2:_(s32) = COPY $x13
+    %mid2:_(s32) = COPY $x14
+    %lo2:_(s32) = COPY $x15
+    %x1:_(s96) = G_MERGE_VALUES %hi1(s32), %mid1(s32), %lo1(s32)
+    %x2:_(s96) = G_MERGE_VALUES %hi2(s32), %mid2(s32), %lo2(s32)
+    %y:_(s96) = G_ADD %x1, %x2
+    %hi:_(s32), %mid:_(s32), %lo:_(s32) = G_UNMERGE_VALUES %y(s96)
+    $x10 = COPY %hi(s32)
+    $x11 = COPY %mid(s32)
+    $x12 = COPY %lo(s32)
+    PseudoRET implicit $x10, implicit $x11, implicit $x12
+
+...
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-sub.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-sub.mir
@@ -2,6 +2,26 @@
 # RUN: llc -mtriple=riscv32 -run-pass=legalizer %s -o - \
 # RUN: | FileCheck %s
 ---
+name:            sub_i7
+body:             |
+  bb.0.entry:
+    ; CHECK-LABEL: name: sub_i7
+    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
+    ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY]], [[COPY1]]
+    ; CHECK-NEXT: $x10 = COPY [[SUB]](s32)
+    ; CHECK-NEXT: PseudoRET implicit $x10
+    %0:_(s32) = COPY $x10
+    %1:_(s32) = COPY $x11
+    %2:_(s7) = G_TRUNC %0(s32)
+    %3:_(s7) = G_TRUNC %1(s32)
+    %4:_(s7) = G_SUB %2, %3
+    %5:_(s32) = G_ANYEXT %4(s7)
+    $x10 = COPY %5(s32)
+    PseudoRET implicit $x10
+
+...
+---
 name:            sub_i8
 body:             |
   bb.0.entry:
@@ -58,3 +78,102 @@ body:             |
     PseudoRET implicit $x10
 
 ...
+---
+name:            sub_i48
+body:             |
+  bb.0.entry:
+    ; CHECK-LABEL: name: sub_i48
+    ; CHECK: %xhi:_(s32) = COPY $x10
+    ; CHECK-NEXT: %xlo:_(s32) = COPY $x11
+    ; CHECK-NEXT: %yhi:_(s32) = COPY $x12
+    ; CHECK-NEXT: %ylo:_(s32) = COPY $x13
+    ; CHECK-NEXT: [[USUBO:%[0-9]+]]:_(s32), [[USUBO1:%[0-9]+]]:_(s32) = G_USUBO %xhi, %yhi
+    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
+    ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[USUBO1]], [[C]]
+    ; CHECK-NEXT: [[USUBE:%[0-9]+]]:_(s32), [[USUBE1:%[0-9]+]]:_(s32) = G_USUBE %xlo, %ylo, [[AND]]
+    ; CHECK-NEXT: $x10 = COPY [[USUBO]](s32)
+    ; CHECK-NEXT: $x11 = COPY [[USUBE]](s32)
+    ; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
+    %xhi:_(s32) = COPY $x10
+    %xlo:_(s32) = COPY $x11
+    %yhi:_(s32) = COPY $x12
+    %ylo:_(s32) = COPY $x13
+    %x0:_(s64) = G_MERGE_VALUES %xhi(s32), %xlo(s32)
+    %y0:_(s64) = G_MERGE_VALUES %yhi(s32), %ylo(s32)
+    %x:_(s48) = G_TRUNC %x0(s64)
+    %y:_(s48) = G_TRUNC %y0(s64)
+    %z:_(s48) = G_SUB %x, %y
+    %z0:_(s64) = G_ANYEXT %z(s48)
+    %zhi:_(s32), %zlo:_(s32) = G_UNMERGE_VALUES %z0(s64)
+    $x10 = COPY %zhi(s32)
+    $x11 = COPY %zlo(s32)
+    PseudoRET implicit $x10, implicit $x11
+
+...
+---
+name:            sub_i64
+body:             |
+  bb.0.entry:
+    ; CHECK-LABEL: name: sub_i64
+    ; CHECK: %hi1:_(s32) = COPY $x10
+    ; CHECK-NEXT: %lo1:_(s32) = COPY $x11
+    ; CHECK-NEXT: %hi2:_(s32) = COPY $x12
+    ; CHECK-NEXT: %lo2:_(s32) = COPY $x13
+    ; CHECK-NEXT: [[USUBO:%[0-9]+]]:_(s32), [[USUBO1:%[0-9]+]]:_(s32) = G_USUBO %hi1, %hi2
+    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
+    ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[USUBO1]], [[C]]
+    ; CHECK-NEXT: [[USUBE:%[0-9]+]]:_(s32), [[USUBE1:%[0-9]+]]:_(s32) = G_USUBE %lo1, %lo2, [[AND]]
+    ; CHECK-NEXT: $x10 = COPY [[USUBO]](s32)
+    ; CHECK-NEXT: $x11 = COPY [[USUBE]](s32)
+    ; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
+    %hi1:_(s32) = COPY $x10
+    %lo1:_(s32) = COPY $x11
+    %hi2:_(s32) = COPY $x12
+    %lo2:_(s32) = COPY $x13
+    %x1:_(s64) = G_MERGE_VALUES %hi1(s32), %lo1(s32)
+    %x2:_(s64) = G_MERGE_VALUES %hi2(s32), %lo2(s32)
+    %y:_(s64) = G_SUB %x1, %x2
+    %hiy:_(s32), %loy:_(s32) = G_UNMERGE_VALUES %y(s64)
+    $x10 = COPY %hiy(s32)
+    $x11 = COPY %loy(s32)
+    PseudoRET implicit $x10, implicit $x11
+
+...
+---
+name:            sub_i96
+body:             |
+  bb.0.entry:
+    ; CHECK-LABEL: name: sub_i96
+    ; CHECK: %hi1:_(s32) = COPY $x10
+    ; CHECK-NEXT: %mid1:_(s32) = COPY $x11
+    ; CHECK-NEXT: %lo1:_(s32) = COPY $x12
+    ; CHECK-NEXT: %hi2:_(s32) = COPY $x13
+    ; CHECK-NEXT: %mid2:_(s32) = COPY $x14
+    ; CHECK-NEXT: %lo2:_(s32) = COPY $x15
+    ; CHECK-NEXT: [[USUBO:%[0-9]+]]:_(s32), [[USUBO1:%[0-9]+]]:_(s32) = G_USUBO %hi1, %hi2
+    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
+    ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[USUBO1]], [[C]]
+    ; CHECK-NEXT: [[USUBE:%[0-9]+]]:_(s32), [[USUBE1:%[0-9]+]]:_(s32) = G_USUBE %mid1, %mid2, [[AND]]
+    ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
+    ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[USUBE1]], [[C1]]
+    ; CHECK-NEXT: [[USUBE2:%[0-9]+]]:_(s32), [[USUBE3:%[0-9]+]]:_(s32) = G_USUBE %lo1, %lo2, [[AND1]]
+    ; CHECK-NEXT: $x10 = COPY [[USUBO]](s32)
+    ; CHECK-NEXT: $x11 = COPY [[USUBE]](s32)
+    ; CHECK-NEXT: $x12 = COPY [[USUBE2]](s32)
+    ; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11, implicit $x12
+    %hi1:_(s32) = COPY $x10
+    %mid1:_(s32) = COPY $x11
+    %lo1:_(s32) = COPY $x12
+    %hi2:_(s32) = COPY $x13
+    %mid2:_(s32) = COPY $x14
+    %lo2:_(s32) = COPY $x15
+    %x1:_(s96) = G_MERGE_VALUES %hi1(s32), %mid1(s32), %lo1(s32)
+    %x2:_(s96) = G_MERGE_VALUES %hi2(s32), %mid2(s32), %lo2(s32)
+    %y:_(s96) = G_SUB %x1, %x2
+    %hi:_(s32), %mid:_(s32), %lo:_(s32) = G_UNMERGE_VALUES %y(s96)
+    $x10 = COPY %hi(s32)
+    $x11 = COPY %mid(s32)
+    $x12 = COPY %lo(s32)
+    PseudoRET implicit $x10, implicit $x11, implicit $x12
+
+...