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[X86] Don't form masked instructions if the operation has an addition…
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…al user.

This will cause the operation to be repeated in both a mask and another masked
or unmasked form. This can a wasted of execution resources.

Differential Revision: https://reviews.llvm.org/D60940
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topperc committed Mar 27, 2020
1 parent c682488 commit cdd1cd7
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Showing 4 changed files with 353 additions and 311 deletions.
16 changes: 16 additions & 0 deletions llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
Expand Up @@ -259,6 +259,8 @@ namespace {
SDValue &Index, SDValue &Disp,
SDValue &Segment);

bool isProfitableToFormMaskedOp(SDNode *N) const;

/// Implement addressing mode selection for inline asm expressions.
bool SelectInlineAsmMemoryOperand(const SDValue &Op,
unsigned ConstraintID,
Expand Down Expand Up @@ -722,6 +724,20 @@ X86DAGToDAGISel::IsProfitableToFold(SDValue N, SDNode *U, SDNode *Root) const {
return true;
}

// Indicates it is profitable to form an AVX512 masked operation. Returning
// false will favor a masked register-register masked move or vblendm and the
// operation will be selected separately.
bool X86DAGToDAGISel::isProfitableToFormMaskedOp(SDNode *N) const {
assert(
(N->getOpcode() == ISD::VSELECT || N->getOpcode() == X86ISD::SELECTS) &&
"Unexpected opcode!");

// If the operation has additional users, the operation will be duplicated.
// Check the use count to prevent that.
// FIXME: Are there cheap opcodes we might want to duplicate?
return N->getOperand(1).hasOneUse();
}

/// Replace the original chain operand of the call with
/// load's chain operand and move load below the call's chain operand.
static void moveBelowOrigChain(SelectionDAG *CurDAG, SDValue Load,
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