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[AMDGPU] Introduce never uniform bit field in tablegen
IsNeverUniform can be set to 1 to mark instructions which are inherently never-uniform/divergent. Enabling this bit in Writelane instruction for now. To be extended to all required instructions. Reviewed By: arsenm, sameerds, #amdgpu Differential Revision: https://reviews.llvm.org/D143154
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Yashwant Singh
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Yashwant Singh
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Feb 8, 2023
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llvm/test/Analysis/DivergenceAnalysis/AMDGPU/MIR/always-uniform.mir
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llvm/test/Analysis/DivergenceAnalysis/AMDGPU/MIR/never-uniform.mir
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