[TypePromotion] Promote undef by converting to 0.

If we're promoting an undef I think that means that we expect the upper bits are zero. undef doesn't guarantee that. This patch replaces undef with 0 to ensure this. This matches how a zext or sext of undef would be folded by InstCombine/InstSimplify. I haven't found a failure from this was just thinking through the code. Differential Revision: https://reviews.llvm.org/D123174
llvm · May 12, 2022 · cec249c · cec249c
1 parent 40e9654
commit cec249c
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Showing 4 changed files with 9 additions and 9 deletions.
diff --git a/llvm/lib/CodeGen/TypePromotion.cpp b/llvm/lib/CodeGen/TypePromotion.cpp
@@ -489,7 +489,7 @@ void IRPromoter::PromoteTree() {
                                  : ConstantExpr::getZExt(Const, ExtTy);
         I->setOperand(i, NewConst);
       } else if (isa<UndefValue>(Op))
-        I->setOperand(i, UndefValue::get(ExtTy));
+        I->setOperand(i, ConstantInt::get(ExtTy, 0));
     }
 
     // Mutate the result type, unless this is an icmp or switch.

diff --git a/llvm/test/CodeGen/AArch64/typepromotion-phisret.ll b/llvm/test/CodeGen/AArch64/typepromotion-phisret.ll
@@ -180,14 +180,14 @@ exit:                                             ; preds = %if.end
 define i16 @phi_multiple_undefs(i16 zeroext %arg) {
 ; CHECK-LABEL: phi_multiple_undefs:
 ; CHECK:       // %bb.0: // %entry
-; CHECK-NEXT:    mov w8, #1
-; CHECK-NEXT:    // implicit-def: $w9
+; CHECK-NEXT:    mov w8, wzr
+; CHECK-NEXT:    mov w9, #1
 ; CHECK-NEXT:  .LBB4_1: // %loop
 ; CHECK-NEXT:    // =>This Inner Loop Header: Depth=1
-; CHECK-NEXT:    cmp w9, #128
-; CHECK-NEXT:    cinc w10, w8, lo
-; CHECK-NEXT:    add w9, w9, w10
-; CHECK-NEXT:    cmp w9, #253
+; CHECK-NEXT:    cmp w8, #128
+; CHECK-NEXT:    cinc w10, w9, lo
+; CHECK-NEXT:    add w8, w8, w10
+; CHECK-NEXT:    cmp w8, #253
 ; CHECK-NEXT:    b.lo .LBB4_1
 ; CHECK-NEXT:  // %bb.2: // %exit
 ; CHECK-NEXT:    ret

diff --git a/llvm/test/Transforms/TypePromotion/AArch64/trunc-zext-chain.ll b/llvm/test/Transforms/TypePromotion/AArch64/trunc-zext-chain.ll
@@ -140,7 +140,7 @@ define i32 @with_undef() {
 ; CHECK:       bb3:
 ; CHECK-NEXT:    [[VAR4:%.*]] = phi i64 [ [[VAR33:%.*]], [[BB31:%.*]] ], [ undef, [[BB:%.*]] ]
 ; CHECK-NEXT:    [[VAR5:%.*]] = phi %struct.wobble* [ [[VAR38:%.*]], [[BB31]] ], [ [[VAR]], [[BB]] ]
-; CHECK-NEXT:    [[VAR6:%.*]] = phi i32 [ [[VAR32:%.*]], [[BB31]] ], [ undef, [[BB]] ]
+; CHECK-NEXT:    [[VAR6:%.*]] = phi i32 [ [[VAR32:%.*]], [[BB31]] ], [ 0, [[BB]] ]
 ; CHECK-NEXT:    [[VAR7:%.*]] = icmp eq %struct.wobble* [[VAR5]], null
 ; CHECK-NEXT:    br i1 [[VAR7]], label [[BB8:%.*]], label [[BB9:%.*]]
 ; CHECK:       bb8:

diff --git a/llvm/test/Transforms/TypePromotion/ARM/phis-ret.ll b/llvm/test/Transforms/TypePromotion/ARM/phis-ret.ll
@@ -227,7 +227,7 @@ define i16 @phi_multiple_undefs(i16 zeroext %arg) {
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    br label [[LOOP:%.*]]
 ; CHECK:       loop:
-; CHECK-NEXT:    [[VAL:%.*]] = phi i32 [ undef, [[ENTRY:%.*]] ], [ [[INC2:%.*]], [[IF_END:%.*]] ]
+; CHECK-NEXT:    [[VAL:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC2:%.*]], [[IF_END:%.*]] ]
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i32 [[VAL]], 128
 ; CHECK-NEXT:    br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
 ; CHECK:       if.then: