Skip to content

Commit

Permalink
[SystemZ] Use valid base/index regs for inline asm
Browse files Browse the repository at this point in the history
Summary:
Inline asm memory constraints can have the base or index register be assigned
to %r0 right now. Make sure that we assign only ADDR64 registers to the base
and index.

Reviewers: uweigand

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D23367

llvm-svn: 279157
  • Loading branch information
zhanjunl committed Aug 18, 2016
1 parent 36bde4f commit cf2f4b3
Show file tree
Hide file tree
Showing 2 changed files with 25 additions and 2 deletions.
23 changes: 23 additions & 0 deletions llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1375,6 +1375,29 @@ SelectInlineAsmMemoryOperand(const SDValue &Op,
}

if (selectBDXAddr(Form, DispRange, Op, Base, Disp, Index)) {
const TargetRegisterClass *TRC =
Subtarget->getRegisterInfo()->getPointerRegClass(*MF);
SDLoc DL(Base);
SDValue RC = CurDAG->getTargetConstant(TRC->getID(), DL, MVT::i32);

// Make sure that the base address doesn't go into %r0.
// If it's a TargetFrameIndex or a fixed register, we shouldn't do anything.
if (Base.getOpcode() != ISD::TargetFrameIndex &&
Base.getOpcode() != ISD::Register) {
Base =
SDValue(CurDAG->getMachineNode(TargetOpcode::COPY_TO_REGCLASS,
DL, Base.getValueType(),
Base, RC), 0);
}

// Make sure that the index register isn't assigned to %r0 either.
if (Index.getOpcode() != ISD::Register) {
Index =
SDValue(CurDAG->getMachineNode(TargetOpcode::COPY_TO_REGCLASS,
DL, Index.getValueType(),
Index, RC), 0);
}

OutOps.push_back(Base);
OutOps.push_back(Disp);
OutOps.push_back(Index);
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/SystemZ/asm-02.ll
Original file line number Diff line number Diff line change
Expand Up @@ -74,8 +74,8 @@ define void @f6(i64 %base, i64 %index) {
; Check that LAY is used if there is an index but the displacement is too large
define void @f7(i64 %base, i64 %index) {
; CHECK-LABEL: f7:
; CHECK: lay %r0, 4096(%r3,%r2)
; CHECK: blah 0(%r0)
; CHECK: lay %r1, 4096(%r3,%r2)
; CHECK: blah 0(%r1)
; CHECK: br %r14
%add = add i64 %base, 4096
%addi = add i64 %add, %index
Expand Down

0 comments on commit cf2f4b3

Please sign in to comment.