[VPlan] Handle VPValues without underlying values in getTypeForVPValue.

Fixes a crash after 0c8e5be. Full type inference will be added in #69013
llvm · Oct 27, 2023 · cff6652 · cff6652
1 parent 8e0b3a8
commit cff6652
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Showing 2 changed files with 40 additions and 2 deletions.
diff --git a/llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp b/llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
@@ -827,7 +827,7 @@ static Type *getTypeForVPValue(VPValue *VPV) {
   if (auto *VPC = dyn_cast<VPWidenCastRecipe>(VPV))
     return VPC->getResultType();
   auto *UV = VPV->getUnderlyingValue();
-  return UV->getType();
+  return UV ? UV->getType() : nullptr;
 }
 
 /// Try to simplify recipe \p R.
@@ -848,7 +848,8 @@ static void simplifyRecipe(VPRecipeBase &R) {
       break;
     VPValue *A = Zext->getOperand(0);
     VPValue *Trunc = R.getVPSingleValue();
-    if (getTypeForVPValue(Trunc) == getTypeForVPValue(A))
+    Type *TruncToTy = getTypeForVPValue(Trunc);
+    if (TruncToTy && TruncToTy == getTypeForVPValue(A))
       Trunc->replaceAllUsesWith(A);
     break;
   }

diff --git a/llvm/test/Transforms/LoopVectorize/cast-induction.ll b/llvm/test/Transforms/LoopVectorize/cast-induction.ll
@@ -40,3 +40,40 @@ exit:
   ret void
 }
 
+define void @redundant_iv_cast(ptr %dst) {
+; VF4-LABEL: @redundant_iv_cast
+; VF4: vector.body:
+; VF4:   [[VEC_IND:%.+]] = phi <4 x i16> [ <i16 0, i16 1, i16 2, i16 3>, %vector.ph ], [ [[VEC_IND_NEXT:%.+]], %vector.body ]
+; VF4:  store <4 x i16> [[VEC_IND]]
+; VF4:  [[VEC_IND_NEXT]] = add <4 x i16> [[VEC_IND]], <i16 4, i16 4, i16 4, i16 4>
+;
+; IC2-LABEL: @redundant_iv_cast
+; IC2:      vector.body:
+; IC2-NEXT:  [[CAN_IV:%.+]] = phi i32 [ 0, %vector.ph ], [ [[CAN_IV_NEXT:%.+]], %vector.body ]
+; IC2-NEXT:  [[OFFSET_IDX:%.+]] = trunc i32 [[CAN_IV]] to i16
+; IC2-NEXT:  [[P0:%.+]] = add i16 [[OFFSET_IDX]], 0
+; IC2-NEXT:  [[P1:%.+]] = add i16 [[OFFSET_IDX]], 1
+; IC2-NEXT:  [[Z0:%.+]] = zext i16 [[P0]] to i32
+; IC2-NEXT:  [[Z1:%.+]] = zext i16 [[P1]] to i32
+; IC2-NEXT:  [[T0:%.+]] = trunc i32 [[Z0]] to i16
+; IC2-NEXT:  [[T1:%.+]] = trunc i32 [[Z1]] to i16
+; IC2:       store i16 [[T0]]
+; IC2-NEXT:  store i16 [[T1]]
+;
+entry:
+  br label %loop
+
+loop:
+  %j.0 = phi i16 [ 0, %entry ], [ %inc, %loop ]
+  %ext = zext i16 %j.0 to i32
+  %trunc = trunc i32 %ext to i16
+  %gep = getelementptr inbounds i16, ptr %dst, i16 %j.0
+  store i16 %trunc, ptr %gep
+  %0 = icmp eq i16 10000, %j.0
+  %inc = add i16 %j.0, 1
+  br i1 %0, label %exit, label %loop
+
+
+exit:
+  ret void
+}