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[mlir][spirv] Change op doc description autogen separator
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This commit changes the separator line for dividing auto-generated
docs from spec and manually added appendix from "### Custom assembly
form" to "<!-- End of AutoGen section -->". This is in preparation
to use the declarative assembly form in MLIR core. We will replace
more and more manually written assembly forms to be autogenerated.

Differential Revision: https://reviews.llvm.org/D77158
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@antiagainst
antiagainst committed Mar 31, 2020
1 parent 45b6364 commit d26435c
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Showing 13 changed files with 431 additions and 410 deletions.
97 changes: 51 additions & 46 deletions mlir/include/mlir/Dialect/SPIRV/SPIRVArithmeticOps.td
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Expand Up @@ -44,16 +44,16 @@ def SPV_FAddOp : SPV_ArithmeticBinaryOp<"FAdd", SPV_Float, [Commutative]> {

Results are computed per component.

### Custom assembly form
<!-- End of AutoGen section -->
```
float-scalar-vector-type ::= float-type |
`vector<` integer-literal `x` float-type `>`
fadd-op ::= ssa-id `=` `spv.FAdd` ssa-use, ssa-use
`:` float-scalar-vector-type
```
For example:
#### Example:

```
```mlir
%4 = spv.FAdd %0, %1 : f32
%5 = spv.FAdd %2, %3 : vector<4xf32>
```
Expand All @@ -74,17 +74,17 @@ def SPV_FDivOp : SPV_ArithmeticBinaryOp<"FDiv", SPV_Float, []> {
Results are computed per component. The resulting value is undefined
if Operand 2 is 0.

### Custom assembly form
<!-- End of AutoGen section -->
```
float-scalar-vector-type ::= float-type |
`vector<` integer-literal `x` float-type `>`
fdiv-op ::= ssa-id `=` `spv.FDiv` ssa-use, ssa-use
`:` float-scalar-vector-type
```

For example:
#### Example:

```
```mlir
%4 = spv.FDiv %0, %1 : f32
%5 = spv.FDiv %2, %3 : vector<4xf32>
```
Expand All @@ -109,16 +109,16 @@ def SPV_FModOp : SPV_ArithmeticBinaryOp<"FMod", SPV_Float, []> {
1 divided by Operand 2 where if r ≠ 0, the sign of r is the same as the
sign of Operand 2.

### Custom assembly form
<!-- End of AutoGen section -->
```
float-scalar-vector-type ::= float-type |
`vector<` integer-literal `x` float-type `>`
fmod-op ::= ssa-id `=` `spv.FMod` ssa-use, ssa-use
`:` float-scalar-vector-type
```
For example:
#### Example:

```
```mlir
%4 = spv.FMod %0, %1 : f32
%5 = spv.FMod %2, %3 : vector<4xf32>
```
Expand All @@ -138,7 +138,7 @@ def SPV_FMulOp : SPV_ArithmeticBinaryOp<"FMul", SPV_Float, [Commutative]> {

Results are computed per component.

### Custom assembly form
<!-- End of AutoGen section -->

```
float-scalar-vector-type ::= float-type |
Expand All @@ -147,9 +147,9 @@ def SPV_FMulOp : SPV_ArithmeticBinaryOp<"FMul", SPV_Float, [Commutative]> {
`:` float-scalar-vector-type
```

For example:
#### Example:

```
```mlir
%4 = spv.FMul %0, %1 : f32
%5 = spv.FMul %2, %3 : vector<4xf32>
```
Expand All @@ -159,7 +159,12 @@ def SPV_FMulOp : SPV_ArithmeticBinaryOp<"FMul", SPV_Float, [Commutative]> {
// -----

def SPV_FNegateOp : SPV_ArithmeticUnaryOp<"FNegate", SPV_Float, []> {
let summary = "Floating-point subtract of Operand from zero.";
let summary = [{
Inverts the sign bit of Operand. (Note, however, that OpFNegate is still
considered a floating-point instruction, and so is subject to the
general floating-point rules regarding, for example, subnormals and NaN
propagation).
}];

let description = [{
Result Type must be a scalar or vector of floating-point type.
Expand All @@ -168,17 +173,17 @@ def SPV_FNegateOp : SPV_ArithmeticUnaryOp<"FNegate", SPV_Float, []> {

Results are computed per component.

### Custom assembly form
<!-- End of AutoGen section -->

```
float-scalar-vector-type ::= float-type |
`vector<` integer-literal `x` float-type `>`
fmul-op ::= `spv.FNegate` ssa-use `:` float-scalar-vector-type
```

For example:
#### Example:

```
```mlir
%1 = spv.FNegate %0 : f32
%3 = spv.FNegate %2 : vector<4xf32>
```
Expand All @@ -203,17 +208,17 @@ def SPV_FRemOp : SPV_ArithmeticBinaryOp<"FRem", SPV_Float, []> {
1 divided by Operand 2 where if r ≠ 0, the sign of r is the same as the
sign of Operand 1.

### Custom assembly form
<!-- End of AutoGen section -->
```
float-scalar-vector-type ::= float-type |
`vector<` integer-literal `x` float-type `>`
frem-op ::= ssa-id `=` `spv.FRemOp` ssa-use, ssa-use
`:` float-scalar-vector-type
```

For example:
#### Example:

```
```mlir
%4 = spv.FRemOp %0, %1 : f32
%5 = spv.FRemOp %2, %3 : vector<4xf32>
```
Expand All @@ -233,17 +238,17 @@ def SPV_FSubOp : SPV_ArithmeticBinaryOp<"FSub", SPV_Float, []> {

Results are computed per component.

### Custom assembly form
<!-- End of AutoGen section -->
```
float-scalar-vector-type ::= float-type |
`vector<` integer-literal `x` float-type `>`
fsub-op ::= ssa-id `=` `spv.FRemOp` ssa-use, ssa-use
`:` float-scalar-vector-type
```

For example:
#### Example:

```
```mlir
%4 = spv.FRemOp %0, %1 : f32
%5 = spv.FRemOp %2, %3 : vector<4xf32>
```
Expand All @@ -268,17 +273,17 @@ def SPV_IAddOp : SPV_ArithmeticBinaryOp<"IAdd", SPV_Integer, [Commutative]> {

Results are computed per component.

### Custom assembly form
<!-- End of AutoGen section -->
```
integer-scalar-vector-type ::= integer-type |
`vector<` integer-literal `x` integer-type `>`
iadd-op ::= ssa-id `=` `spv.IAdd` ssa-use, ssa-use
`:` integer-scalar-vector-type
```

For example:
#### Example:

```
```mlir
%4 = spv.IAdd %0, %1 : i32
%5 = spv.IAdd %2, %3 : vector<4xi32>

Expand Down Expand Up @@ -306,17 +311,17 @@ def SPV_IMulOp : SPV_ArithmeticBinaryOp<"IMul", SPV_Integer, [Commutative]> {

Results are computed per component.

### Custom assembly form
<!-- End of AutoGen section -->
```
integer-scalar-vector-type ::= integer-type |
`vector<` integer-literal `x` integer-type `>`
imul-op ::= ssa-id `=` `spv.IMul` ssa-use, ssa-use
`:` integer-scalar-vector-type
```

For example:
#### Example:

```
```mlir
%4 = spv.IMul %0, %1 : i32
%5 = spv.IMul %2, %3 : vector<4xi32>

Expand Down Expand Up @@ -344,17 +349,17 @@ def SPV_ISubOp : SPV_ArithmeticBinaryOp<"ISub", SPV_Integer, []> {

Results are computed per component.

### Custom assembly form
<!-- End of AutoGen section -->
```
integer-scalar-vector-type ::= integer-type |
`vector<` integer-literal `x` integer-type `>`
isub-op ::= `spv.ISub` ssa-use, ssa-use
`:` integer-scalar-vector-type
```

For example:
#### Example:

```
```mlir
%4 = spv.ISub %0, %1 : i32
%5 = spv.ISub %2, %3 : vector<4xi32>

Expand All @@ -379,17 +384,17 @@ def SPV_SDivOp : SPV_ArithmeticBinaryOp<"SDiv", SPV_Integer, []> {
Results are computed per component. The resulting value is undefined
if Operand 2 is 0.

### Custom assembly form
<!-- End of AutoGen section -->
```
integer-scalar-vector-type ::= integer-type |
`vector<` integer-literal `x` integer-type `>`
sdiv-op ::= ssa-id `=` `spv.SDiv` ssa-use, ssa-use
`:` integer-scalar-vector-type
```

For example:
#### Example:

```
```mlir
%4 = spv.SDiv %0, %1 : i32
%5 = spv.SDiv %2, %3 : vector<4xi32>

Expand Down Expand Up @@ -417,16 +422,16 @@ def SPV_SModOp : SPV_ArithmeticBinaryOp<"SMod", SPV_Integer, []> {
1 divided by Operand 2 where if r ≠ 0, the sign of r is the same as the
sign of Operand 2.

### Custom assembly form
<!-- End of AutoGen section -->
```
integer-scalar-vector-type ::= integer-type |
`vector<` integer-literal `x` integer-type `>`
smod-op ::= ssa-id `=` `spv.SMod` ssa-use, ssa-use
`:` integer-scalar-vector-type
```
For example:
#### Example:

```
```mlir
%4 = spv.SMod %0, %1 : i32
%5 = spv.SMod %2, %3 : vector<4xi32>

Expand Down Expand Up @@ -454,16 +459,16 @@ def SPV_SRemOp : SPV_ArithmeticBinaryOp<"SRem", SPV_Integer, []> {
1 divided by Operand 2 where if r ≠ 0, the sign of r is the same as the
sign of Operand 1.

### Custom assembly form
<!-- End of AutoGen section -->
```
integer-scalar-vector-type ::= integer-type |
`vector<` integer-literal `x` integer-type `>`
srem-op ::= ssa-id `=` `spv.SRem` ssa-use, ssa-use
`:` integer-scalar-vector-type
```
For example:
#### Example:

```
```mlir
%4 = spv.SRem %0, %1 : i32
%5 = spv.SRem %2, %3 : vector<4xi32>

Expand All @@ -486,16 +491,16 @@ def SPV_UDivOp : SPV_ArithmeticBinaryOp<"UDiv", SPV_Integer, []> {
Results are computed per component. The resulting value is undefined
if Operand 2 is 0.

### Custom assembly form
<!-- End of AutoGen section -->
```
integer-scalar-vector-type ::= integer-type |
`vector<` integer-literal `x` integer-type `>`
udiv-op ::= ssa-id `=` `spv.UDiv` ssa-use, ssa-use
`:` integer-scalar-vector-type
```
For example:
#### Example:

```
```mlir
%4 = spv.UDiv %0, %1 : i32
%5 = spv.UDiv %2, %3 : vector<4xi32>

Expand All @@ -518,16 +523,16 @@ def SPV_UModOp : SPV_ArithmeticBinaryOp<"UMod", SPV_Integer> {
Results are computed per component. The resulting value is undefined
if Operand 2 is 0.

### Custom assembly form
<!-- End of AutoGen section -->
```
integer-scalar-vector-type ::= integer-type |
`vector<` integer-literal `x` integer-type `>`
umod-op ::= ssa-id `=` `spv.UMod` ssa-use, ssa-use
`:` integer-scalar-vector-type
```
For example:
#### Example:

```
```mlir
%4 = spv.UMod %0, %1 : i32
%5 = spv.UMod %2, %3 : vector<4xi32>

Expand Down

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