[InstCombine] Remove unneeded isa<PHINode> check in foldOpIntoPhi

This check is redundant as it is covered by the call to isPotentiallyReachable. Depends on D155726. Differential Revision: https://reviews.llvm.org/D155718
llvm · Aug 16, 2023 · d53b3df · d53b3df
1 parent e549d57
commit d53b3df
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Showing 3 changed files with 7 additions and 9 deletions.
diff --git a/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp b/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
@@ -1396,7 +1396,6 @@ Instruction *InstCombinerImpl::foldOpIntoPhi(Instruction &I, PHINode *PN) {
       continue;
     }
 
-    if (isa<PHINode>(InVal)) return nullptr;  // Itself a phi.
     if (NonSimplifiedBB) return nullptr;  // More than one non-simplified value.
 
     NonSimplifiedBB = InBB;

diff --git a/llvm/test/Analysis/ValueTracking/known-power-of-two-urem.ll b/llvm/test/Analysis/ValueTracking/known-power-of-two-urem.ll
@@ -15,12 +15,11 @@ define i64 @known_power_of_two_urem_phi(i64 %size, i1 %cmp, i1 %cmp1) {
 ; CHECK:       cond.true.false:
 ; CHECK-NEXT:    br label [[COND_TRUE_END]]
 ; CHECK:       cond.true.end:
-; CHECK-NEXT:    [[PHI:%.*]] = phi i64 [ 2, [[COND_TRUE_TRUE]] ], [ 4, [[COND_TRUE_FALSE]] ]
+; CHECK-NEXT:    [[PHI:%.*]] = phi i64 [ 1, [[COND_TRUE_TRUE]] ], [ 3, [[COND_TRUE_FALSE]] ]
 ; CHECK-NEXT:    br label [[COND_END]]
 ; CHECK:       cond.end:
-; CHECK-NEXT:    [[PHI1:%.*]] = phi i64 [ 4096, [[ENTRY:%.*]] ], [ [[PHI]], [[COND_TRUE_END]] ]
-; CHECK-NEXT:    [[TMP0:%.*]] = add nsw i64 [[PHI1]], -1
-; CHECK-NEXT:    [[UREM:%.*]] = and i64 [[TMP0]], [[SIZE:%.*]]
+; CHECK-NEXT:    [[PHI1:%.*]] = phi i64 [ 4095, [[ENTRY:%.*]] ], [ [[PHI]], [[COND_TRUE_END]] ]
+; CHECK-NEXT:    [[UREM:%.*]] = and i64 [[PHI1]], [[SIZE:%.*]]
 ; CHECK-NEXT:    ret i64 [[UREM]]
 ;
 entry:

diff --git a/llvm/test/Transforms/InstCombine/icmp-fold-into-phi.ll b/llvm/test/Transforms/InstCombine/icmp-fold-into-phi.ll
@@ -10,14 +10,14 @@ define i1 @SwitchTest(i32 %x, i32 %y) {
 ; CHECK-NEXT:    i32 1, label [[BB3:%.*]]
 ; CHECK-NEXT:    ]
 ; CHECK:       bb1:
+; CHECK-NEXT:    [[TMP0:%.*]] = icmp ugt i32 [[Y]], 1
 ; CHECK-NEXT:    br label [[BB2]]
 ; CHECK:       bb2:
-; CHECK-NEXT:    [[PHI1:%.*]] = phi i32 [ 1, [[ENTRY:%.*]] ], [ [[Y]], [[BB1]] ]
+; CHECK-NEXT:    [[PHI1:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[TMP0]], [[BB1]] ]
 ; CHECK-NEXT:    br label [[BB3]]
 ; CHECK:       bb3:
-; CHECK-NEXT:    [[PHI2:%.*]] = phi i32 [ [[PHI1]], [[BB2]] ], [ 0, [[ENTRY]] ]
-; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i32 [[PHI2]], 1
-; CHECK-NEXT:    ret i1 [[CMP]]
+; CHECK-NEXT:    [[PHI2:%.*]] = phi i1 [ [[PHI1]], [[BB2]] ], [ false, [[ENTRY]] ]
+; CHECK-NEXT:    ret i1 [[PHI2]]
 ;
 entry:
   switch i32 %x, label %bb1 [