[Sparc] Don't use SunStyleELFSectionSwitchSyntax

As discussed in D85414 <https://reviews.llvm.org/D85414>, two tests currently `FAIL` on Sparc since that backend uses the Sun assembler syntax for the `.section` directive, controlled by `SunStyleELFSectionSwitchSyntax`. Instead of adapting the affected tests, this patch changes that default. The internal assembler still accepts both forms as input, only the output syntax is affected. Current support for the Sun syntax is cursory at best: the built-in assembler cannot even assemble some of the directives emitted by GCC, and the set supported by the Solaris assembler is even larger: SPARC Assembly Language Reference Manual, 3.4 Pseudo-Op Attributes <https://docs.oracle.com/cd/E37838_01/html/E61063/gmabi.html#scrolltoc>. A few Sparc test cases need to be adjusted. At the same time, the patch fixes the failures from D85414 <https://reviews.llvm.org/D85414>. Tested on `sparcv9-sun-solaris2.11`. Differential Revision: https://reviews.llvm.org/D85415
llvm · Aug 17, 2022 · d999348 · d999348
1 parent 1d522a3
commit d999348
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Showing 4 changed files with 7 additions and 9 deletions.
diff --git a/llvm/lib/MC/MCParser/ELFAsmParser.cpp b/llvm/lib/MC/MCParser/ELFAsmParser.cpp
@@ -566,8 +566,7 @@ bool ELFAsmParser::ParseSectionArguments(bool IsPush, SMLoc loc) {
     }
 
     if (getLexer().isNot(AsmToken::String)) {
-      if (!getContext().getAsmInfo()->usesSunStyleELFSectionSwitchSyntax()
-          || getLexer().isNot(AsmToken::Hash))
+      if (getLexer().isNot(AsmToken::Hash))
         return TokError("expected string in directive");
       extraFlags = parseSunStyleSectionFlags();
     } else {

diff --git a/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp b/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp
@@ -40,7 +40,6 @@ SparcELFMCAsmInfo::SparcELFMCAsmInfo(const Triple &TheTriple) {
 
   ExceptionsType = ExceptionHandling::DwarfCFI;
 
-  SunStyleELFSectionSwitchSyntax = true;
   UsesELFSectionDirectiveForBSS = true;
 }
 

diff --git a/llvm/test/CodeGen/SPARC/2008-10-10-InlineAsmRegOperand.ll b/llvm/test/CodeGen/SPARC/2008-10-10-InlineAsmRegOperand.ll
@@ -2,8 +2,8 @@
 ; PR 1557
 
 target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f128:128:128"
-module asm "\09.section\09\22.ctors\22,#alloc,#write"
-module asm "\09.section\09\22.dtors\22,#alloc,#write"
+module asm "\09.section\09.ctors,\22aw\22"
+module asm "\09.section\09.dtors,\22aw\22"
 
 define void @frame_dummy() nounwind {
 entry:

diff --git a/llvm/test/CodeGen/SPARC/constructor.ll b/llvm/test/CodeGen/SPARC/constructor.ll
@@ -14,16 +14,16 @@ entry:
   ret void
 }
 
-; CTOR:      .section      .ctors,#alloc,#write
+; CTOR:      .section      .ctors,"aw"
 ; CTOR-NEXT: .p2align      2
 ; CTOR-NEXT: .word  f
-; CTOR-NEXT: .section      .ctors.65520,#alloc,#write
+; CTOR-NEXT: .section      .ctors.65520,"aGw"
 ; CTOR-NEXT: .p2align      2
 ; CTOR-NEXT: .word  g
 
-; INIT-ARRAY:    .section  .init_array.15,#alloc,#write
+; INIT-ARRAY:    .section  .init_array.15,"aGw"
 ; INIT-ARRAY-NEXT: .p2align  2
 ; INIT-ARRAY-NEXT: .word g
-; INIT-ARRAY-NEXT: .section  .init_array,#alloc,#write
+; INIT-ARRAY-NEXT: .section  .init_array,"aw"
 ; INIT-ARRAY-NEXT: .p2align  2
 ; INIT-ARRAY-NEXT: .word f