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[AMDGPU] Fixed hang during DAG combine
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SITargetLowering::reassociateScalarOps() does not touch constants
so that DAGCombiner::ReassociateOps() does not revert the combine.
However a global address is not a ConstantSDNode.

Switched to the method used by DAGCombiner::ReassociateOps() itself
to detect constants.

Differential Revision: https://reviews.llvm.org/D58695

llvm-svn: 354926
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rampitec committed Feb 26, 2019
1 parent ddc181d commit da1628e
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Showing 2 changed files with 18 additions and 1 deletion.
3 changes: 2 additions & 1 deletion llvm/lib/Target/AMDGPU/SIISelLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -8477,7 +8477,8 @@ SDValue SITargetLowering::reassociateScalarOps(SDNode *N,

// If either operand is constant this will conflict with
// DAGCombiner::ReassociateOps().
if (isa<ConstantSDNode>(Op0) || isa<ConstantSDNode>(Op1))
if (DAG.isConstantIntBuildVectorOrConstantInt(Op0) ||
DAG.isConstantIntBuildVectorOrConstantInt(Op1))
return SDValue();

SDLoc SL(N);
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16 changes: 16 additions & 0 deletions llvm/test/CodeGen/AMDGPU/reassoc-scalar.ll
Original file line number Diff line number Diff line change
Expand Up @@ -109,5 +109,21 @@ bb:
ret void
}

@var = common hidden local_unnamed_addr addrspace(1) global [4 x i32] zeroinitializer, align 4

; GCN-LABEL: reassoc_i32_ga:
; GCN: s_add_u32 s{{[0-9]+}}, s{{[0-9]+}}, var@rel32@lo+4
; GCN: s_addc_u32 s{{[0-9]+}}, s{{[0-9]+}}, var@rel32@hi+4
; GCN: s_endpgm
define amdgpu_kernel void @reassoc_i32_ga(i64 %x) {
bb:
%tid = tail call i32 @llvm.amdgcn.workitem.id.x()
%t64 = zext i32 %tid to i64
%add1 = getelementptr [4 x i32], [4 x i32] addrspace(1)* @var, i64 0, i64 %t64
%add2 = getelementptr i32, i32 addrspace(1)* %add1, i64 %x
store volatile i32 1, i32 addrspace(1)* %add2, align 4
ret void
}

declare i32 @llvm.amdgcn.workitem.id.x()
declare i32 @llvm.amdgcn.workitem.id.y()

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