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[X86][CodeGen] Support EVEX compression: NDD to nonNDD
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@KanRobert
KanRobert committed Jan 11, 2024
1 parent e4e0b65 commit dc7c1d1
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Showing 10 changed files with 70 additions and 40 deletions.
40 changes: 35 additions & 5 deletions llvm/lib/Target/X86/X86CompressEVEX.cpp
View file
Expand Up @@ -220,6 +220,27 @@ static bool performCustomAdjustments(MachineInstr &MI, unsigned NewOpc) {
return true;
}

static bool isRedundantNewDataDest(MachineInstr &MI, const X86Subtarget &ST) {
// add rbx, rbx, rax / add rbx, rax, rbx -> add rbx, rax
const MCInstrDesc &Desc = MI.getDesc();
Register Reg0 = MI.getOperand(0).getReg();
const MachineOperand &Op1 = MI.getOperand(1);
if (!Op1.isReg())
return false;
Register Reg1 = Op1.getReg();
if (Reg1 == Reg0)
return true;

// Op1 and Op2 may be commutable for ND instructions.
if (!Desc.isCommutable() || Desc.getNumOperands() < 3 ||
!MI.getOperand(2).isReg() || MI.getOperand(2).getReg() != Reg0)
return false;
// Opcode may change after commute, e.g. SHRD -> SHLD
// TODO: Add test for this after ND SHRD/SHLD is supported
ST.getInstrInfo()->commuteInstruction(MI, false, 1, 2);
return true;
}

static bool CompressEVEXImpl(MachineInstr &MI, const X86Subtarget &ST) {
uint64_t TSFlags = MI.getDesc().TSFlags;

Expand All @@ -241,26 +262,35 @@ static bool CompressEVEXImpl(MachineInstr &MI, const X86Subtarget &ST) {
//
// For AVX512 cases, EVEX prefix is needed in order to carry this information
// thus preventing the transformation to VEX encoding.
bool IsND = X86II::hasNewDataDest(TSFlags);
if (TSFlags & X86II::EVEX_B)
return false;
if (!IsND || !isRedundantNewDataDest(MI, ST))
return false;

ArrayRef<X86CompressEVEXTableEntry> Table = ArrayRef(X86CompressEVEXTable);

unsigned Opc = MI.getOpcode();
const auto *I = llvm::lower_bound(Table, Opc);
if (I == Table.end() || I->OldOpc != Opc)
if (I == Table.end() || I->OldOpc != Opc) {
assert(!IsND && "Missing entry for ND instruction");
return false;
}

if (usesExtendedRegister(MI) || !checkVEXInstPredicate(Opc, ST) ||
!performCustomAdjustments(MI, I->NewOpc))
return false;
if (!IsND) {
if (usesExtendedRegister(MI) || !checkVEXInstPredicate(Opc, ST) ||
!performCustomAdjustments(MI, I->NewOpc))
return false;
}

const MCInstrDesc &NewDesc = ST.getInstrInfo()->get(I->NewOpc);
MI.setDesc(NewDesc);
uint64_t Encoding = NewDesc.TSFlags & X86II::EncodingMask;
auto AsmComment =
(Encoding == X86II::VEX) ? X86::AC_EVEX_2_VEX : X86::AC_EVEX_2_LEGACY;
MI.setAsmPrinterFlag(AsmComment);
if (IsND)
MI.tieOperands(0, 1);

return true;
}

Expand Down
10 changes: 5 additions & 5 deletions llvm/test/CodeGen/X86/apx/adc.ll
View file
Expand Up @@ -114,7 +114,7 @@ define i16 @adc16ri8(i16 %a, i16 %x, i16 %y) nounwind {
; CHECK: # %bb.0:
; CHECK-NEXT: subw %si, %dx, %ax
; CHECK-NEXT: adcw $0, %di, %ax
; CHECK-NEXT: addl $123, %eax, %eax
; CHECK-NEXT: addl $123, %eax
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq
%s = add i16 %a, 123
Expand Down Expand Up @@ -168,7 +168,7 @@ define i16 @adc16ri(i16 %a, i16 %x, i16 %y) nounwind {
; CHECK: # %bb.0:
; CHECK-NEXT: subw %si, %dx, %ax
; CHECK-NEXT: adcw $0, %di, %ax
; CHECK-NEXT: addl $1234, %eax, %eax # imm = 0x4D2
; CHECK-NEXT: addl $1234, %eax # imm = 0x4D2
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq
%s = add i16 %a, 1234
Expand Down Expand Up @@ -265,7 +265,7 @@ define i16 @adc16mi8(ptr %ptr, i16 %x, i16 %y) nounwind {
; CHECK: # %bb.0:
; CHECK-NEXT: subw %si, %dx, %ax
; CHECK-NEXT: adcw $0, (%rdi), %ax
; CHECK-NEXT: addl $123, %eax, %eax
; CHECK-NEXT: addl $123, %eax
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq
%a = load i16, ptr %ptr
Expand Down Expand Up @@ -323,7 +323,7 @@ define i16 @adc16mi(ptr %ptr, i16 %x, i16 %y) nounwind {
; CHECK: # %bb.0:
; CHECK-NEXT: subw %si, %dx, %ax
; CHECK-NEXT: adcw $0, (%rdi), %ax
; CHECK-NEXT: addl $1234, %eax, %eax # imm = 0x4D2
; CHECK-NEXT: addl $1234, %eax # imm = 0x4D2
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq
%a = load i16, ptr %ptr
Expand Down Expand Up @@ -442,7 +442,7 @@ define void @adc16mi_legacy(ptr %ptr, i16 %x, i16 %y) nounwind {
; CHECK: # %bb.0:
; CHECK-NEXT: subw %si, %dx, %ax
; CHECK-NEXT: adcw $0, (%rdi), %ax
; CHECK-NEXT: addl $1234, %eax, %eax # imm = 0x4D2
; CHECK-NEXT: addl $1234, %eax # imm = 0x4D2
; CHECK-NEXT: movw %ax, (%rdi)
; CHECK-NEXT: retq
%a = load i16, ptr %ptr
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/X86/apx/add.ll
View file
Expand Up @@ -206,7 +206,7 @@ define i16 @add16mi8(ptr %a) {
; CHECK-LABEL: add16mi8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movzwl (%rdi), %eax
; CHECK-NEXT: addl $123, %eax, %eax
; CHECK-NEXT: addl $123, %eax
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq
entry:
Expand Down Expand Up @@ -252,7 +252,7 @@ define i16 @add16mi(ptr %a) {
; CHECK-LABEL: add16mi:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movzwl (%rdi), %eax
; CHECK-NEXT: addl $1234, %eax, %eax # imm = 0x4D2
; CHECK-NEXT: addl $1234, %eax # imm = 0x4D2
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq
entry:
Expand Down Expand Up @@ -489,8 +489,8 @@ define i1 @add64ri_reloc(i16 %k) {
; CHECK: # %bb.0:
; CHECK-NEXT: # kill: def $edi killed $edi def $rdi
; CHECK-NEXT: movswq %di, %rax
; CHECK-NEXT: addq %rax, %rax, %rax
; CHECK-NEXT: addq $val, %rax, %rax
; CHECK-NEXT: addq %rax, %rax
; CHECK-NEXT: addq $val, %rax
; CHECK-NEXT: setne %al
; CHECK-NEXT: retq
%g = getelementptr inbounds i16, ptr @val, i16 %k
Expand Down
6 changes: 3 additions & 3 deletions llvm/test/CodeGen/X86/apx/compress-evex.mir
View file
Expand Up @@ -6,7 +6,7 @@ name: ndd_2_non_ndd_xor
body: |
bb.0.entry:
liveins: $rdi, $rsi
; CHECK: xorq %rsi, %rax, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x31,0xf0]
; CHECK: xorq %rsi, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x31,0xf0]
renamable $rax = ADD64rr_ND killed renamable $rdi, renamable $rsi, implicit-def dead $eflags
renamable $rax = XOR64rr_ND killed renamable $rax, killed renamable $rsi, implicit-def dead $eflags
RET64 $rax
Expand All @@ -17,7 +17,7 @@ name: ndd_2_non_ndd_sub
body: |
bb.0.entry:
liveins: $rdi, $rsi
; CHECK: subq %rsi, %rax, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xf0]
; CHECK: subq %rsi, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x29,0xf0]
renamable $rax = ADD64rr_ND killed renamable $rdi, renamable $rsi, implicit-def dead $eflags
renamable $rax = SUB64rr_ND killed renamable $rax, killed renamable $rsi, implicit-def dead $eflags
RET64 $rax
Expand All @@ -28,7 +28,7 @@ name: ndd_2_non_ndd_commutable
body: |
bb.0.entry:
liveins: $rdi, $rsi
; CHECK: xorq %rax, %rsi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x31,0xc6]
; CHECK: xorq %rsi, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x31,0xf0]
renamable $rax = ADD64rr_ND killed renamable $rdi, renamable $rsi, implicit-def dead $eflags
renamable $rax = XOR64rr_ND killed renamable $rsi, killed renamable $rax, implicit-def dead $eflags
RET64 $rax
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/X86/apx/dec.ll
View file
Expand Up @@ -57,7 +57,7 @@ define i16 @dec16m(ptr %ptr) {
; CHECK-LABEL: dec16m:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movzwl (%rdi), %eax
; CHECK-NEXT: decl %eax, %eax
; CHECK-NEXT: decl %eax
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq
entry:
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/X86/apx/inc.ll
View file
Expand Up @@ -57,7 +57,7 @@ define i16 @inc16m(ptr %ptr) {
; CHECK-LABEL: inc16m:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movzwl (%rdi), %eax
; CHECK-NEXT: incl %eax, %eax
; CHECK-NEXT: incl %eax
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq
entry:
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/X86/apx/or.ll
View file
Expand Up @@ -207,7 +207,7 @@ define i16 @or16mi8(ptr %a) {
; CHECK-LABEL: or16mi8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movzwl (%rdi), %eax
; CHECK-NEXT: orl $123, %eax, %eax
; CHECK-NEXT: orl $123, %eax
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq
entry:
Expand Down Expand Up @@ -253,7 +253,7 @@ define i16 @or16mi(ptr %a) {
; CHECK-LABEL: or16mi:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movzwl (%rdi), %eax
; CHECK-NEXT: orl $1234, %eax, %eax # imm = 0x4D2
; CHECK-NEXT: orl $1234, %eax # imm = 0x4D2
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq
entry:
Expand Down
28 changes: 14 additions & 14 deletions llvm/test/CodeGen/X86/apx/sbb.ll
View file
Expand Up @@ -114,7 +114,7 @@ define i16 @sbb16ri8(i16 %a, i16 %x, i16 %y) nounwind {
; CHECK: # %bb.0:
; CHECK-NEXT: subw %si, %dx, %ax
; CHECK-NEXT: sbbw $0, %di, %ax
; CHECK-NEXT: addl $-123, %eax, %eax
; CHECK-NEXT: addl $-123, %eax
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq
%s = sub i16 %a, 123
Expand All @@ -129,7 +129,7 @@ define i32 @sbb32ri8(i32 %a, i32 %x, i32 %y) nounwind {
; CHECK: # %bb.0:
; CHECK-NEXT: subl %esi, %edx, %eax
; CHECK-NEXT: sbbl $0, %edi, %eax
; CHECK-NEXT: addl $-123, %eax, %eax
; CHECK-NEXT: addl $-123, %eax
; CHECK-NEXT: retq
%s = sub i32 %a, 123
%k = icmp ugt i32 %x, %y
Expand All @@ -143,7 +143,7 @@ define i64 @sbb64ri8(i64 %a, i64 %x, i64 %y) nounwind {
; CHECK: # %bb.0:
; CHECK-NEXT: subq %rsi, %rdx, %rax
; CHECK-NEXT: sbbq $0, %rdi, %rax
; CHECK-NEXT: addq $-123, %rax, %rax
; CHECK-NEXT: addq $-123, %rax
; CHECK-NEXT: retq
%s = sub i64 %a, 123
%k = icmp ugt i64 %x, %y
Expand All @@ -157,7 +157,7 @@ define i8 @sbb8ri(i8 %a, i8 %x, i8 %y) nounwind {
; CHECK: # %bb.0:
; CHECK-NEXT: subb %sil, %dl, %al
; CHECK-NEXT: sbbb $0, %dil, %al
; CHECK-NEXT: addb $-123, %al, %al
; CHECK-NEXT: addb $-123, %al
; CHECK-NEXT: retq
%s = sub i8 %a, 123
%k = icmp ugt i8 %x, %y
Expand All @@ -171,7 +171,7 @@ define i16 @sbb16ri(i16 %a, i16 %x, i16 %y) nounwind {
; CHECK: # %bb.0:
; CHECK-NEXT: subw %si, %dx, %ax
; CHECK-NEXT: sbbw $0, %di, %ax
; CHECK-NEXT: addl $-1234, %eax, %eax # imm = 0xFB2E
; CHECK-NEXT: addl $-1234, %eax # imm = 0xFB2E
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq
%s = sub i16 %a, 1234
Expand All @@ -186,7 +186,7 @@ define i32 @sbb32ri(i32 %a, i32 %x, i32 %y) nounwind {
; CHECK: # %bb.0:
; CHECK-NEXT: subl %esi, %edx, %eax
; CHECK-NEXT: sbbl $0, %edi, %eax
; CHECK-NEXT: addl $-123456, %eax, %eax # imm = 0xFFFE1DC0
; CHECK-NEXT: addl $-123456, %eax # imm = 0xFFFE1DC0
; CHECK-NEXT: retq
%s = sub i32 %a, 123456
%k = icmp ugt i32 %x, %y
Expand All @@ -200,7 +200,7 @@ define i64 @sbb64ri(i64 %a, i64 %x, i64 %y) nounwind {
; CHECK: # %bb.0:
; CHECK-NEXT: subq %rsi, %rdx, %rax
; CHECK-NEXT: sbbq $0, %rdi, %rax
; CHECK-NEXT: addq $-123456, %rax, %rax # imm = 0xFFFE1DC0
; CHECK-NEXT: addq $-123456, %rax # imm = 0xFFFE1DC0
; CHECK-NEXT: retq
%s = sub i64 %a, 123456
%k = icmp ugt i64 %x, %y
Expand Down Expand Up @@ -270,7 +270,7 @@ define i16 @sbb16mi8(ptr %ptr, i16 %x, i16 %y) nounwind {
; CHECK: # %bb.0:
; CHECK-NEXT: subw %si, %dx, %ax
; CHECK-NEXT: sbbw $0, (%rdi), %ax
; CHECK-NEXT: addl $-123, %eax, %eax
; CHECK-NEXT: addl $-123, %eax
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq
%a = load i16, ptr %ptr
Expand All @@ -286,7 +286,7 @@ define i32 @sbb32mi8(ptr %ptr, i32 %x, i32 %y) nounwind {
; CHECK: # %bb.0:
; CHECK-NEXT: subl %esi, %edx, %eax
; CHECK-NEXT: sbbl $0, (%rdi), %eax
; CHECK-NEXT: addl $-123, %eax, %eax
; CHECK-NEXT: addl $-123, %eax
; CHECK-NEXT: retq
%a = load i32, ptr %ptr
%s = sub i32 %a, 123
Expand All @@ -301,7 +301,7 @@ define i64 @sbb64mi8(ptr %ptr, i64 %x, i64 %y) nounwind {
; CHECK: # %bb.0:
; CHECK-NEXT: subq %rsi, %rdx, %rax
; CHECK-NEXT: sbbq $0, (%rdi), %rax
; CHECK-NEXT: addq $-123, %rax, %rax
; CHECK-NEXT: addq $-123, %rax
; CHECK-NEXT: retq
%a = load i64, ptr %ptr
%s = sub i64 %a, 123
Expand All @@ -316,7 +316,7 @@ define i8 @sbb8mi(ptr %ptr, i8 %x, i8 %y) nounwind {
; CHECK: # %bb.0:
; CHECK-NEXT: subb %sil, %dl, %al
; CHECK-NEXT: sbbb $0, (%rdi), %al
; CHECK-NEXT: addb $-123, %al, %al
; CHECK-NEXT: addb $-123, %al
; CHECK-NEXT: retq
%a = load i8, ptr %ptr
%s = sub i8 %a, 123
Expand All @@ -331,7 +331,7 @@ define i16 @sbb16mi(ptr %ptr, i16 %x, i16 %y) nounwind {
; CHECK: # %bb.0:
; CHECK-NEXT: subw %si, %dx, %ax
; CHECK-NEXT: sbbw $0, (%rdi), %ax
; CHECK-NEXT: addl $-1234, %eax, %eax # imm = 0xFB2E
; CHECK-NEXT: addl $-1234, %eax # imm = 0xFB2E
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq
%a = load i16, ptr %ptr
Expand All @@ -347,7 +347,7 @@ define i32 @sbb32mi(ptr %ptr, i32 %x, i32 %y) nounwind {
; CHECK: # %bb.0:
; CHECK-NEXT: subl %esi, %edx, %eax
; CHECK-NEXT: sbbl $0, (%rdi), %eax
; CHECK-NEXT: addl $-123456, %eax, %eax # imm = 0xFFFE1DC0
; CHECK-NEXT: addl $-123456, %eax # imm = 0xFFFE1DC0
; CHECK-NEXT: retq
%a = load i32, ptr %ptr
%s = sub i32 %a, 123456
Expand All @@ -362,7 +362,7 @@ define i64 @sbb64mi(ptr %ptr, i64 %x, i64 %y) nounwind {
; CHECK: # %bb.0:
; CHECK-NEXT: subq %rsi, %rdx, %rax
; CHECK-NEXT: sbbq $0, (%rdi), %rax
; CHECK-NEXT: addq $-123456, %rax, %rax # imm = 0xFFFE1DC0
; CHECK-NEXT: addq $-123456, %rax # imm = 0xFFFE1DC0
; CHECK-NEXT: retq
%a = load i64, ptr %ptr
%s = sub i64 %a, 123456
Expand Down
6 changes: 3 additions & 3 deletions llvm/test/CodeGen/X86/apx/sub.ll
View file
Expand Up @@ -173,7 +173,7 @@ define i16 @sub16mr(ptr %a, i16 noundef %b) {
; CHECK-LABEL: sub16mr:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movzwl (%rdi), %eax
; CHECK-NEXT: subl %esi, %eax, %eax
; CHECK-NEXT: subl %esi, %eax
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq
entry:
Expand Down Expand Up @@ -208,7 +208,7 @@ define i16 @sub16mi8(ptr %a) {
; CHECK-LABEL: sub16mi8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movzwl (%rdi), %eax
; CHECK-NEXT: addl $-123, %eax, %eax
; CHECK-NEXT: addl $-123, %eax
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq
entry:
Expand Down Expand Up @@ -254,7 +254,7 @@ define i16 @sub16mi(ptr %a) {
; CHECK-LABEL: sub16mi:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movzwl (%rdi), %eax
; CHECK-NEXT: addl $-1234, %eax, %eax # imm = 0xFB2E
; CHECK-NEXT: addl $-1234, %eax # imm = 0xFB2E
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq
entry:
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/X86/apx/xor.ll
View file
Expand Up @@ -207,7 +207,7 @@ define i16 @xor16mi8(ptr %a) {
; CHECK-LABEL: xor16mi8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movzwl (%rdi), %eax
; CHECK-NEXT: xorl $123, %eax, %eax
; CHECK-NEXT: xorl $123, %eax
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq
entry:
Expand Down Expand Up @@ -253,7 +253,7 @@ define i16 @xor16mi(ptr %a) {
; CHECK-LABEL: xor16mi:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movzwl (%rdi), %eax
; CHECK-NEXT: xorl $1234, %eax, %eax # imm = 0x4D2
; CHECK-NEXT: xorl $1234, %eax # imm = 0x4D2
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq
entry:
Expand Down

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