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[lldb/breakpad] Fix register resolution on arm
In breakpad, only x86 (and mips) registers have a leading '$' in their names. Arm architectures use plain register names. Previously, lldb was assuming all registers have a '$'. Fix the code to match the (unfortunately, inconsistent) reality.
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lldb/test/Shell/SymbolFile/Breakpad/Inputs/stack-cfi-arm.syms
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MODULE Linux arm E5894855C35DCCCCCCCCCCCCCCCCCCCC0 linux.out | ||
INFO CODE_ID E35C283BC327C28762DB788BF5A4078BE2351448 | ||
FUNC 0 2 0 func0 | ||
STACK CFI INIT 0 2 .cfa: sp 0 + .ra: lr | ||
STACK CFI 2 .cfa: sp 8 + .ra: .cfa -4 + ^ r7: .cfa -8 + ^ |
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# REQUIRES: arm | ||
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# RUN: yaml2obj %s >%t | ||
# RUN: %lldb -c %t -o "target symbols add %S/Inputs/stack-cfi-arm.syms" \ | ||
# RUN: -o "image show-unwind -n func0" -b | FileCheck %s | ||
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# CHECK: Symbol file UnwindPlan: | ||
# CHECK: row[0]: 0: CFA=DW_OP_breg13 +0, DW_OP_consts +0, DW_OP_plus => pc=DW_OP_breg14 +0 | ||
# CHECK-NEXT: row[1]: 2: CFA=DW_OP_breg13 +0, DW_OP_consts +8, DW_OP_plus => r7=DW_OP_pick 0x00, DW_OP_consts -8, DW_OP_plus , DW_OP_deref pc=DW_OP_pick 0x00, DW_OP_consts -4, DW_OP_plus , DW_OP_deref | ||
# | ||
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--- !minidump | ||
Streams: | ||
- Type: ThreadList | ||
Threads: | ||
- Thread Id: 0x00003E81 | ||
Context: DEAD | ||
Stack: | ||
Start of Memory Range: 0x00007FFCEB34A000 | ||
Content: DEAD | ||
- Type: ModuleList | ||
Modules: | ||
- Base of Image: 0x0000000000400000 | ||
Size of Image: 0x00001000 | ||
Module Name: '/tmp/stack-cfi-arm.out' | ||
CodeView Record: 4C457042E35C283BC327C28762DB788BF5A4078BE2351448 | ||
- Type: SystemInfo | ||
Processor Arch: ARM | ||
Platform ID: Linux | ||
CPU: | ||
CPUID: 0 | ||
... |