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Fix a few clang-tidy warnings (container empty checks, function decl/…
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…def param naming)
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dwblaikie committed Apr 5, 2023
1 parent 7032f6d commit e5144d9
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Showing 5 changed files with 18 additions and 19 deletions.
4 changes: 2 additions & 2 deletions clang/lib/Basic/Targets/X86.h
Original file line number Diff line number Diff line change
Expand Up @@ -206,9 +206,9 @@ class LLVM_LIBRARY_VISIBILITY X86TargetInfo : public TargetInfo {
return RegName.equals("esp") || RegName.equals("rsp");
}

bool validateCpuSupports(StringRef Name) const override;
bool validateCpuSupports(StringRef FeatureStr) const override;

bool validateCpuIs(StringRef Name) const override;
bool validateCpuIs(StringRef FeatureStr) const override;

bool validateCPUSpecificCPUDispatch(StringRef Name) const override;

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21 changes: 10 additions & 11 deletions clang/lib/Sema/SemaChecking.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -4594,7 +4594,7 @@ bool Sema::CheckRISCVBuiltinFunctionCall(const TargetInfo &TI,
std::string FeatureStr = OF.str();
FeatureStr[0] = std::toupper(FeatureStr[0]);
// Combine strings.
FeatureStrs += FeatureStrs == "" ? "" : ", ";
FeatureStrs += FeatureStrs.empty() ? "" : ", ";
FeatureStrs += "'";
FeatureStrs += FeatureStr;
FeatureStrs += "'";
Expand Down Expand Up @@ -9506,13 +9506,13 @@ void CheckFormatHandler::HandlePosition(const char *startPos,
getSpecifierRange(startPos, posLen));
}

void
CheckFormatHandler::HandleInvalidPosition(const char *startPos, unsigned posLen,
analyze_format_string::PositionContext p) {
EmitFormatDiagnostic(S.PDiag(diag::warn_format_invalid_positional_specifier)
<< (unsigned) p,
getLocationOfByte(startPos), /*IsStringLocation*/true,
getSpecifierRange(startPos, posLen));
void CheckFormatHandler::HandleInvalidPosition(
const char *startSpecifier, unsigned specifierLen,
analyze_format_string::PositionContext p) {
EmitFormatDiagnostic(
S.PDiag(diag::warn_format_invalid_positional_specifier) << (unsigned)p,
getLocationOfByte(startSpecifier), /*IsStringLocation*/ true,
getSpecifierRange(startSpecifier, specifierLen));
}

void CheckFormatHandler::HandleZeroPosition(const char *startPos,
Expand Down Expand Up @@ -9557,7 +9557,7 @@ void CheckFormatHandler::DoneProcessing() {

void UncoveredArgHandler::Diagnose(Sema &S, bool IsFunctionCall,
const Expr *ArgExpr) {
assert(hasUncoveredArg() && DiagnosticExprs.size() > 0 &&
assert(hasUncoveredArg() && !DiagnosticExprs.empty() &&
"Invalid state");

if (!ArgExpr)
Expand Down Expand Up @@ -16620,14 +16620,13 @@ static bool findRetainCycleOwner(Sema &S, Expr *e, RetainCycleOwner &owner) {
namespace {

struct FindCaptureVisitor : EvaluatedExprVisitor<FindCaptureVisitor> {
ASTContext &Context;
VarDecl *Variable;
Expr *Capturer = nullptr;
bool VarWillBeReased = false;

FindCaptureVisitor(ASTContext &Context, VarDecl *variable)
: EvaluatedExprVisitor<FindCaptureVisitor>(Context),
Context(Context), Variable(variable) {}
Variable(variable) {}

void VisitDeclRefExpr(DeclRefExpr *ref) {
if (ref->getDecl() == Variable && !Capturer)
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4 changes: 2 additions & 2 deletions llvm/lib/Target/X86/X86ExpandPseudo.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -49,7 +49,7 @@ class X86ExpandPseudo : public MachineFunctionPass {
const X86MachineFunctionInfo *X86FI = nullptr;
const X86FrameLowering *X86FL = nullptr;

bool runOnMachineFunction(MachineFunction &Fn) override;
bool runOnMachineFunction(MachineFunction &MF) override;

MachineFunctionProperties getRequiredProperties() const override {
return MachineFunctionProperties().set(
Expand Down Expand Up @@ -77,7 +77,7 @@ class X86ExpandPseudo : public MachineFunctionPass {
/// placed into separate block guarded by check for al register(for SystemV
/// abi).
void ExpandVastartSaveXmmRegs(
MachineBasicBlock *MBB,
MachineBasicBlock *EntryBlk,
MachineBasicBlock::iterator VAStartPseudoInstr) const;
};
char X86ExpandPseudo::ID = 0;
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6 changes: 3 additions & 3 deletions llvm/lib/Target/X86/X86ISelLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -40685,7 +40685,7 @@ static SDValue combineX86ShufflesRecursively(
unsigned MaxDepth, bool HasVariableMask, bool AllowVariableCrossLaneMask,
bool AllowVariablePerLaneMask, SelectionDAG &DAG,
const X86Subtarget &Subtarget) {
assert(RootMask.size() > 0 &&
assert(!RootMask.empty() &&
(RootMask.size() > 1 || (RootMask[0] == 0 && SrcOpIndex == 0)) &&
"Illegal shuffle root mask");
MVT RootVT = Root.getSimpleValueType();
Expand Down Expand Up @@ -50369,7 +50369,7 @@ static SDValue combineOrCmpEqZeroToCtlzSrl(SDNode *N, SelectionDAG &DAG,
return SDValue();

// Try to lower nodes matching the or(or, setcc(eq, cmp 0)) pattern.
while (ORNodes.size() > 0) {
while (!ORNodes.empty()) {
OR = ORNodes.pop_back_val();
LHS = OR->getOperand(0);
RHS = OR->getOperand(1);
Expand Down Expand Up @@ -52016,7 +52016,7 @@ static bool isHorizontalBinOp(unsigned HOpcode, SDValue &LHS, SDValue &RHS,
resolveTargetShuffleInputsAndMask(SrcOps, SrcMask);
if (!UseSubVector && SrcOps.size() <= 2 &&
scaleShuffleElements(SrcMask, NumElts, ScaledMask)) {
N0 = SrcOps.size() > 0 ? SrcOps[0] : SDValue();
N0 = !SrcOps.empty() ? SrcOps[0] : SDValue();
N1 = SrcOps.size() > 1 ? SrcOps[1] : SDValue();
ShuffleMask.assign(ScaledMask.begin(), ScaledMask.end());
}
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2 changes: 1 addition & 1 deletion llvm/lib/Target/X86/X86LowerAMXType.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -527,7 +527,7 @@ class X86VolatileTileData {
SmallVector<Instruction *, 2> &Incomings);
void replacePhiDefWithLoad(Instruction *PHI, Value *StorePtr);
bool volatileTileData();
void volatileTilePHI(PHINode *Inst);
void volatileTilePHI(PHINode *PHI);
void volatileTileNonPHI(Instruction *I);
};

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