AMDGPU/GlobalISel: Add IMMPopCount xform

Partially fixes BFE pattern import.
llvm · Jan 9, 2020 · e71af77 · e71af77
1 parent 79450a4
commit e71af77
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Showing 3 changed files with 12 additions and 0 deletions.
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUGISel.td b/llvm/lib/Target/AMDGPU/AMDGPUGISel.td
@@ -214,3 +214,6 @@ def gi_NegateImm : GICustomOperandRenderer<"renderNegateImm">,
 
 def gi_bitcast_fpimm_to_i32 : GICustomOperandRenderer<"renderBitcastImm">,
   GISDNodeXFormEquiv<bitcast_fpimm_to_i32>;
+
+def gi_IMMPopCount : GICustomOperandRenderer<"renderPopcntImm">,
+  GISDNodeXFormEquiv<IMMPopCount>;
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
@@ -2128,6 +2128,12 @@ void AMDGPUInstructionSelector::renderBitcastImm(MachineInstrBuilder &MIB,
   }
 }
 
+void AMDGPUInstructionSelector::renderPopcntImm(MachineInstrBuilder &MIB,
+                                                const MachineInstr &MI) const {
+  assert(MI.getOpcode() == TargetOpcode::G_CONSTANT && "Expected G_CONSTANT");
+  MIB.addImm(MI.getOperand(1).getCImm()->getValue().countPopulation());
+}
+
 bool AMDGPUInstructionSelector::isInlineImmediate16(int64_t Imm) const {
   return AMDGPU::isInlinableLiteral16(Imm, STI.hasInv2PiInlineImm());
 }

diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
@@ -177,6 +177,9 @@ class AMDGPUInstructionSelector : public InstructionSelector {
   void renderBitcastImm(MachineInstrBuilder &MIB,
                         const MachineInstr &MI) const;
 
+  void renderPopcntImm(MachineInstrBuilder &MIB,
+                       const MachineInstr &MI) const;
+
   bool isInlineImmediate16(int64_t Imm) const;
   bool isInlineImmediate32(int64_t Imm) const;
   bool isInlineImmediate64(int64_t Imm) const;