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[AArch64][SME] Set fn attributes correctly on __arm_tpidr2_save call.
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Changing the way the attribute is created changes the way the attribute
is added. Now it seems to be correctly added as a function attribute, whereas
before it was not. This led ISel ignoring attributes and setting up a lazy-save
buffer for the call to __arm_tpidr2_save.

This patch also marks the intrinsic call as 'preserves_za' which together with the
above prevents the code-generator from setting up a lazy-save buffer.

Reviewed By: kmclaughlin

Differential Revision: https://reviews.llvm.org/D136342
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sdesmalen-arm committed Oct 28, 2022
1 parent 1dc3937 commit e82cace
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Showing 2 changed files with 10 additions and 6 deletions.
9 changes: 6 additions & 3 deletions llvm/lib/Target/AArch64/SMEABIPass.cpp
Expand Up @@ -63,12 +63,15 @@ FunctionPass *llvm::createSMEABIPass() { return new SMEABI(); }
void emitTPIDR2Save(Module *M, IRBuilder<> &Builder) {
auto *TPIDR2SaveTy =
FunctionType::get(Builder.getVoidTy(), {}, /*IsVarArgs=*/false);

auto Attrs =
AttributeList::get(M->getContext(), 0, {"aarch64_pstate_sm_compatible"});
AttributeList()
.addFnAttribute(M->getContext(), "aarch64_pstate_sm_compatible")
.addFnAttribute(M->getContext(), "aarch64_pstate_za_preserved");
FunctionCallee Callee =
M->getOrInsertFunction("__arm_tpidr2_save", TPIDR2SaveTy, Attrs);
Builder.CreateCall(Callee);
CallInst *Call = Builder.CreateCall(Callee);
Call->setCallingConv(
CallingConv::AArch64_SME_ABI_Support_Routines_PreserveMost_From_X0);

// A save to TPIDR2 should be followed by clearing TPIDR2_EL0.
Function *WriteIntr =
Expand Down
7 changes: 4 additions & 3 deletions llvm/test/CodeGen/AArch64/sme-new-za-function.ll
Expand Up @@ -10,7 +10,7 @@ define void @private_za() "aarch64_pstate_za_new" {
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i64 [[TPIDR2]], 0
; CHECK-NEXT: br i1 [[CMP]], label [[SAVE_ZA:%.*]], label [[TMP0:%.*]]
; CHECK: save.za:
; CHECK-NEXT: call void @__arm_tpidr2_save()
; CHECK-NEXT: call aarch64_sme_preservemost_from_x0 void @__arm_tpidr2_save()
; CHECK-NEXT: call void @llvm.aarch64.sme.set.tpidr2(i64 0)
; CHECK-NEXT: br label [[TMP0]]
; CHECK: 0:
Expand All @@ -30,7 +30,7 @@ define i32 @private_za_multiple_exit(i32 %a, i32 %b, i64 %cond) "aarch64_pstate_
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i64 [[TPIDR2]], 0
; CHECK-NEXT: br i1 [[CMP]], label [[SAVE_ZA:%.*]], label [[ENTRY:%.*]]
; CHECK: save.za:
; CHECK-NEXT: call void @__arm_tpidr2_save()
; CHECK-NEXT: call aarch64_sme_preservemost_from_x0 void @__arm_tpidr2_save()
; CHECK-NEXT: call void @llvm.aarch64.sme.set.tpidr2(i64 0)
; CHECK-NEXT: br label [[ENTRY]]
; CHECK: entry:
Expand Down Expand Up @@ -59,4 +59,5 @@ if.end:
ret i32 %sub
}

; CHECK: declare "aarch64_pstate_sm_compatible" void @__arm_tpidr2_save()
; CHECK: declare void @__arm_tpidr2_save() #[[ATTR:[0-9]+]]
; CHECK: attributes #[[ATTR]] = { "aarch64_pstate_sm_compatible" "aarch64_pstate_za_preserved" }

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