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Commit 354ded6 ("tsan: align ThreadState to cache line") did an incomplete thing. It marked ThreadState as cache line aligned, but the thread local ThreadState instance is declared as an aligned char array with hard-coded 64-byte alignment. On PowerPC cache line size is 128 bytes, so the hard-coded 64-byte alignment is not enough. Use cache line alignment consistently. Differential Revision: https://reviews.llvm.org/D110629
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