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[SelectionDAGBuilder] Update signature of
getRegsAndSizes()
.
The mapping between registers and relative size has been updated to use TypeSize to account for the size of scalable EVTs. The patch is a NFCI, if not for the fact that with this change the function `getUnderlyingArgRegs` does not raise a warning for implicit conversion of `TypeSize` to `unsigned` when generating machine code from the test added to the patch. Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D92096
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Francesco Petrogalli
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Joe Ellis
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Nov 30, 2020
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30
llvm/test/CodeGen/AArch64/sdag-no-typesize-warnings-regandsizes.ll
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; RUN: llc -mtriple=aarch64-unknown-linux-gnu -mattr=+sve < %s 2>%t | FileCheck %s | ||
; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t | ||
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; If this check fails please read | ||
; clang/test/CodeGen/aarch64-sve-intrinsics/README for instructions on | ||
; how to resolve it. | ||
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; WARN-NOT: warning | ||
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; CHECK-LABEL: do_something: | ||
define <vscale x 2 x double> @do_something(<vscale x 2 x double> %vx) { | ||
entry: | ||
call void @llvm.dbg.value(metadata <vscale x 2 x double> %vx, metadata !3, metadata !DIExpression()), !dbg !5 | ||
%0 = tail call <vscale x 2 x double> @f(<vscale x 2 x double> %vx) | ||
ret <vscale x 2 x double> %0 | ||
} | ||
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declare <vscale x 2 x double> @f(<vscale x 2 x double>) | ||
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declare void @llvm.dbg.value(metadata, metadata, metadata) | ||
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!llvm.dbg.cu = !{!0} | ||
!llvm.module.flags = !{!2} | ||
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!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1) | ||
!1 = !DIFile(filename: "file.c", directory: "/") | ||
!2 = !{i32 2, !"Debug Info Version", i32 3} | ||
!3 = !DILocalVariable(scope: !4) | ||
!4 = distinct !DISubprogram(unit: !0) | ||
!5 = !DILocation(scope: !4) |